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authorCatalin Marinas <catalin.marinas@arm.com>2012-03-05 11:49:27 +0000
committerCatalin Marinas <catalin.marinas@arm.com>2012-09-17 13:41:56 +0100
commitc1cc1552616d0f354d040823151e61634e7ad01f (patch)
tree7c9118864bba9fd78aaec954e2f5269dbbc68240 /arch/arm64/include/asm/pgalloc.h
parent4f04d8f00545110a0e525ae2fb62ab38cb417236 (diff)
downloadlinux-c1cc1552616d0f354d040823151e61634e7ad01f.tar.gz
arm64: MMU initialisation
This patch contains the initialisation of the memory blocks, MMU attributes and the memory map. Only five memory types are defined: Device nGnRnE (equivalent to Strongly Ordered), Device nGnRE (classic Device memory), Device GRE, Normal Non-cacheable and Normal Cacheable. Cache policies are supported via the memory attributes register (MAIR_EL1) and only affect the Normal Cacheable mappings. This patch also adds the SPARSEMEM_VMEMMAP initialisation. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm64/include/asm/pgalloc.h')
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