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authorHelge Deller <deller@gmx.de>2015-11-25 22:43:45 +0100
committerHelge Deller <deller@gmx.de>2016-01-12 22:12:09 +0100
commit2c2277dc8e18eac8a59cdd0c62ca15106ab6f857 (patch)
tree23e1974f06cd6b90f4c2ed6cec8889db9dd93590 /arch/parisc/include
parentfbdd9501a1123ae6d8d828d97df89bf122d951ca (diff)
downloadlinux-2c2277dc8e18eac8a59cdd0c62ca15106ab6f857.tar.gz
parisc: Imporove debug info about space registers and TLB configuration
Signed-off-by: Helge Deller <deller@gmx.de>
Diffstat (limited to 'arch/parisc/include')
-rw-r--r--arch/parisc/include/asm/pdc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/parisc/include/asm/pdc.h b/arch/parisc/include/asm/pdc.h
index 7eb616e4bf8a..451906d78136 100644
--- a/arch/parisc/include/asm/pdc.h
+++ b/arch/parisc/include/asm/pdc.h
@@ -63,7 +63,7 @@ struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
- tc_pad1 : 8; /* ITLB: width of space-registers (encoded) */
+ tc_sr : 8; /* ITLB: width of space-registers (encoded) */
};
struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */