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authorAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>2015-12-01 09:06:58 +0530
committerMichael Ellerman <mpe@ellerman.id.au>2015-12-14 15:19:16 +1100
commit45949ebe6c748cba93c1dd6ab9d03190f862ecf7 (patch)
tree57dabe380a05a01f8e0bf573dcc083e3c8fbd937 /arch/powerpc/include/asm/nohash/64/pgtable.h
parentcc50380db32771af61201cff39da1043b90f2a6d (diff)
downloadlinux-45949ebe6c748cba93c1dd6ab9d03190f862ecf7.tar.gz
powerpc/nohash: we don't use real_pte_t for nohash
Remove the related functions and #defines Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/nohash/64/pgtable.h')
-rw-r--r--arch/powerpc/include/asm/nohash/64/pgtable.h33
1 files changed, 0 insertions, 33 deletions
diff --git a/arch/powerpc/include/asm/nohash/64/pgtable.h b/arch/powerpc/include/asm/nohash/64/pgtable.h
index 03c226965b46..b9f734dd5b81 100644
--- a/arch/powerpc/include/asm/nohash/64/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/64/pgtable.h
@@ -106,39 +106,6 @@
#endif /* CONFIG_PPC_MM_SLICES */
#ifndef __ASSEMBLY__
-
-/*
- * This is the default implementation of various PTE accessors, it's
- * used in all cases except Book3S with 64K pages where we have a
- * concept of sub-pages
- */
-#ifndef __real_pte
-
-#ifdef CONFIG_STRICT_MM_TYPECHECKS
-#define __real_pte(e,p) ((real_pte_t){(e)})
-#define __rpte_to_pte(r) ((r).pte)
-#else
-#define __real_pte(e,p) (e)
-#define __rpte_to_pte(r) (__pte(r))
-#endif
-#define __rpte_to_hidx(r,index) (pte_val(__rpte_to_pte(r)) >> _PAGE_F_GIX_SHIFT)
-
-#define pte_iterate_hashed_subpages(rpte, psize, va, index, shift) \
- do { \
- index = 0; \
- shift = mmu_psize_defs[psize].shift; \
-
-#define pte_iterate_hashed_end() } while(0)
-
-/*
- * We expect this to be called only for user addresses or kernel virtual
- * addresses other than the linear mapping.
- */
-#define pte_pagesize_index(mm, addr, pte) MMU_PAGE_4K
-
-#endif /* __real_pte */
-
-
/* pte_clear moved to later in this file */
#define PMD_BAD_BITS (PTE_TABLE_SIZE-1)