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authorDavid S. Miller <davem@davemloft.net>2013-05-04 18:34:13 -0700
committerDavid S. Miller <davem@davemloft.net>2013-05-04 18:34:13 -0700
commit048c9acca90ca7da42b92745445fe008a48add88 (patch)
treee2e551a565a7dcdca0fc398aa659231745e5a901 /arch/sparc/Kconfig
parent07df841877195765d958df146f614fc7bdedd5e3 (diff)
parentad348cc5349be4ef4abe08819afbb63386585413 (diff)
downloadlinux-048c9acca90ca7da42b92745445fe008a48add88.tar.gz
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc
Merge sparc bug fixes that didn't make it into v3.9 into sparc-next. Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'arch/sparc/Kconfig')
-rw-r--r--arch/sparc/Kconfig26
1 files changed, 2 insertions, 24 deletions
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 33e48cbf25ab..a639c0d07b8b 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -62,7 +62,6 @@ config SPARC64
select HAVE_RCU_TABLE_FREE if SMP
select HAVE_MEMBLOCK
select HAVE_MEMBLOCK_NODE_MAP
- select HAVE_SYSCALL_WRAPPERS
select HAVE_ARCH_TRANSPARENT_HUGEPAGE
select HAVE_DYNAMIC_FTRACE
select HAVE_FTRACE_MCOUNT_RECORD
@@ -257,29 +256,6 @@ config HOTPLUG_CPU
if SPARC64
source "drivers/cpufreq/Kconfig"
-
-config US3_FREQ
- tristate "UltraSPARC-III CPU Frequency driver"
- depends on CPU_FREQ
- select CPU_FREQ_TABLE
- help
- This adds the CPUFreq driver for UltraSPARC-III processors.
-
- For details, take a look at <file:Documentation/cpu-freq>.
-
- If in doubt, say N.
-
-config US2E_FREQ
- tristate "UltraSPARC-IIe CPU Frequency driver"
- depends on CPU_FREQ
- select CPU_FREQ_TABLE
- help
- This adds the CPUFreq driver for UltraSPARC-IIe processors.
-
- For details, take a look at <file:Documentation/cpu-freq>.
-
- If in doubt, say N.
-
endif
config US3_MC
@@ -414,6 +390,8 @@ config SERIAL_CONSOLE
config SPARC_LEON
bool "Sparc Leon processor family"
depends on SPARC32
+ select USB_EHCI_BIG_ENDIAN_MMIO
+ select USB_EHCI_BIG_ENDIAN_DESC
---help---
If you say Y here if you are running on a SPARC-LEON processor.
The LEON processor is a synthesizable VHDL model of the