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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2013-11-14 11:35:31 +0200
committerMark Brown <broonie@linaro.org>2013-12-10 11:22:16 +0000
commit487dce8823cdcb70e645e5312a0d4f7081e1ad13 (patch)
tree0ad7ab39c4066e48c2eee00d000afc5366c22fc2 /sound/soc/davinci/davinci-mcasp.h
parent8f113b77b511c9e26706d4eb077af0ba30893ee4 (diff)
downloadlinux-487dce8823cdcb70e645e5312a0d4f7081e1ad13.tar.gz
ASoC: davinci-mcasp: Simplify FIFO configuration code
The FIFO registers base address is different in dm646x compared to newer SoCs with McASP IP. Instead of using two paths (switch/case) to handle the difference we can simply pick the correct base address beforehand and use offsets to address the register we need to configure. With this change the indentation depth can be reduced as well. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/davinci/davinci-mcasp.h')
-rw-r--r--sound/soc/davinci/davinci-mcasp.h16
1 files changed, 8 insertions, 8 deletions
diff --git a/sound/soc/davinci/davinci-mcasp.h b/sound/soc/davinci/davinci-mcasp.h
index 80e5a1846687..8fed757d6087 100644
--- a/sound/soc/davinci/davinci-mcasp.h
+++ b/sound/soc/davinci/davinci-mcasp.h
@@ -90,14 +90,14 @@
#define DAVINCI_MCASP_RXBUF_REG 0x280
/* McASP FIFO Registers */
-#define DAVINCI_MCASP_WFIFOCTL (0x1010)
-#define DAVINCI_MCASP_WFIFOSTS (0x1014)
-#define DAVINCI_MCASP_RFIFOCTL (0x1018)
-#define DAVINCI_MCASP_RFIFOSTS (0x101C)
-#define MCASP_VER3_WFIFOCTL (0x1000)
-#define MCASP_VER3_WFIFOSTS (0x1004)
-#define MCASP_VER3_RFIFOCTL (0x1008)
-#define MCASP_VER3_RFIFOSTS (0x100C)
+#define DAVINCI_MCASP_V2_AFIFO_BASE (0x1010)
+#define DAVINCI_MCASP_V3_AFIFO_BASE (0x1000)
+
+/* FIFO register offsets from AFIFO base */
+#define MCASP_WFIFOCTL_OFFSET (0x0)
+#define MCASP_WFIFOSTS_OFFSET (0x4)
+#define MCASP_RFIFOCTL_OFFSET (0x8)
+#define MCASP_RFIFOSTS_OFFSET (0xc)
/*
* DAVINCI_MCASP_PWREMUMGT_REG - Power Down and Emulation Management