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authorAndi Kleen <ak@linux.intel.com>2016-03-21 08:56:33 -0700
committerArnaldo Carvalho de Melo <acme@redhat.com>2016-03-22 10:01:45 -0300
commit4ca0d8193f8b6b2c74d05d9bbcbaa99fdd553503 (patch)
treea2179975234d8c61d43ef9d6fe5591115926cfa3 /tools/perf/Documentation/perf-list.txt
parent3c52b658b8e4fbbf7975932bbdc4798421dbcb15 (diff)
downloadlinux-4ca0d8193f8b6b2c74d05d9bbcbaa99fdd553503.tar.gz
perf list: Fix documentation of :ppp
Correctly document what is implemented for :ppp on Intel CPUs in recent kernels. Signed-off-by: Andi Kleen <ak@linux.intel.com> Acked-by: Jiri Olsa <jolsa@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Link: http://lkml.kernel.org/r/1458575793-12091-2-git-send-email-andi@firstfloor.org Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools/perf/Documentation/perf-list.txt')
-rw-r--r--tools/perf/Documentation/perf-list.txt6
1 files changed, 4 insertions, 2 deletions
diff --git a/tools/perf/Documentation/perf-list.txt b/tools/perf/Documentation/perf-list.txt
index 79483f40e991..ec723d0a5bb3 100644
--- a/tools/perf/Documentation/perf-list.txt
+++ b/tools/perf/Documentation/perf-list.txt
@@ -40,10 +40,12 @@ address should be. The 'p' modifier can be specified multiple times:
0 - SAMPLE_IP can have arbitrary skid
1 - SAMPLE_IP must have constant skid
2 - SAMPLE_IP requested to have 0 skid
- 3 - SAMPLE_IP must have 0 skid
+ 3 - SAMPLE_IP must have 0 skid, or uses randomization to avoid
+ sample shadowing effects.
For Intel systems precise event sampling is implemented with PEBS
-which supports up to precise-level 2.
+which supports up to precise-level 2, and precise level 3 for
+some special cases
On AMD systems it is implemented using IBS (up to precise-level 2).
The precise modifier works with event types 0x76 (cpu-cycles, CPU