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2013-06-12arm64: KVM: define 32bit specific registersMarc Zyngier3-3/+47
Define the 32bit specific registers (SPSRs, cp15...). Most CPU registers are directly mapped to a 64bit register (r0->x0...). Only the SPSRs have separate registers. cp15 registers are also mapped into their 64bit counterpart in most cases. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-12arm64: KVM: Build system integrationMarc Zyngier2-0/+24
Only the Makefile is plugged in. The Kconfig stuff is in a separate patch to allow for an easier merge process. Reviewed-by: Christopher Covington <cov@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-12arm64: KVM: PSCI implementationMarc Zyngier4-10/+47
Wire the PSCI backend into the exit handling code. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-12arm64: KVM: Plug the arch timerMarc Zyngier2-0/+68
Add support for the in-kernel timer emulation. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-12ARM: KVM: timer: allow DT matching for ARMv8 coresMarc Zyngier1-0/+1
ARMv8 cores have the exact same timer as ARMv7 cores. Make sure the KVM timer code can match it in the device tree. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-12arm64: KVM: Plug the VGICMarc Zyngier1-0/+88
Add support for the in-kernel GIC emulation. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-12arm64: KVM: Exit handlingMarc Zyngier1-0/+119
Handle the exit of a VM, decoding the exit reason from HYP mode and calling the corresponding handler. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-12arm64: KVM: HYP mode world switch implementationMarc Zyngier2-0/+650
The HYP mode world switch in all its glory. Implements save/restore of host/guest registers, EL2 trapping, IPA resolution, and additional services (tlb invalidation). Reviewed-by: Christopher Covington <cov@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: hypervisor initialization codeMarc Zyngier2-0/+120
Provide EL2 with page tables and stack, and set the vectors to point to the full blown world-switch code. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: guest one-reg interfaceMarc Zyngier1-0/+259
Let userspace play with the guest registers. Reviewed-by: Christopher Covington <cov@codeaurora.org> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: MMIO access backendMarc Zyngier1-0/+59
Define the necessary structures to perform an MMIO access. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: kvm_arch and kvm_vcpu_arch definitionsMarc Zyngier1-0/+186
Provide the architecture dependent structures for VM and vcpu abstractions. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: virtual CPU resetMarc Zyngier1-0/+76
Provide the reset code for a virtual CPU booted in 64bit mode. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: CPU specific system registers handlingMarc Zyngier1-0/+85
Add the support code for CPU specific system registers. Not much here yet. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: system register handlingMarc Zyngier5-0/+1102
Provide 64bit system register handling, modeled after the cp15 handling for ARM. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: user space interfaceMarc Zyngier1-0/+117
Provide the kvm.h file that defines the user space visible interface. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: architecture specific MMU backendMarc Zyngier1-0/+135
Define the arm64 specific MMU backend: - HYP/kernel VA offset - S2 4/64kB definitions - S2 page table populating and flushing - icache cleaning Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: fault injection into a guestMarc Zyngier1-0/+126
Implement the injection of a fault (undefined, data abort or prefetch abort) into a 64bit guest. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: Basic ESR_EL2 helpers and vcpu register accessMarc Zyngier1-0/+158
Implements helpers for dealing with the EL2 syndrome register as well as accessing the vcpu registers. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: system register definitions for 64bit guestsMarc Zyngier1-0/+68
Define the saved/restored registers for 64bit guests. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: EL2 register definitionsMarc Zyngier1-0/+245
Define all the useful bitfields for EL2 registers. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: HYP mode idmap supportMarc Zyngier1-0/+20
Add the necessary infrastructure for identity-mapped HYP page tables. Idmap-ed code must be in the ".hyp.idmap.text" linker section. The rest of the HYP ends up in ".hyp.text". Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-07arm64: KVM: define HYP and Stage-2 translation page flagsMarc Zyngier3-0/+37
Add HYP and S2 page flags, for both normal and device memory. Reviewed-by: Christopher Covington <cov@codeaurora.org> Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
2013-06-02Linux 3.10-rc4Linus Torvalds1-1/+1
2013-06-02Merge branch 'for-3.10' of ↵Linus Torvalds9-16/+23
git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux Pull parisc fixes from Helge Deller: "This patcheset includes fixes for: - the PCI/LBA which brings back the stifb graphics framebuffer console - possible memory overflows in parisc kernel init code - parport support on older GSC machines - avoids that users by mistake enable PARPORT_PC_SUPERIO on parisc - MAINTAINERS file list updates for parisc." * 'for-3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux: parisc: parport0: fix this legacy no-device port driver! parport_pc: disable PARPORT_PC_SUPERIO on parisc architecture parisc/PCI: lba: fix: convert to pci_create_root_bus() for correct root bus resources (v2) parisc/PCI: Set type for LBA bus_num resource MAINTAINERS: update parisc architecture file list parisc: kernel: using strlcpy() instead of strcpy() parisc: rename "CONFIG_PA7100" to "CONFIG_PA7000" parisc: fix kernel BUG at arch/parisc/include/asm/mmzone.h:50 parisc: memory overflow, 'name' length is too short for using
2013-06-01parisc: parport0: fix this legacy no-device port driver!Helge Deller2-4/+4
Fix the above kernel error from parport_announce_port() on 32bit GSC machines (e.g. B160L). The parport driver requires now a pointer to the device struct. Signed-off-by: Helge Deller <deller@gmx.de>
2013-06-01parport_pc: disable PARPORT_PC_SUPERIO on parisc architectureHelge Deller1-1/+1
If enabled, CONFIG_PARPORT_PC_SUPERIO scans on PC-like hardware for various super-io chips by accessing i/o ports in a range which will crash any parisc hardware at once. In addition, parisc has it's own incompatible superio chip (CONFIG_SUPERIO), so if we disable PARPORT_PC_SUPERIO completely for parisc we can avoid that people by accident enable the parport_pc superio option too. Signed-off-by: Helge Deller <deller@gmx.de>
2013-06-01parisc/PCI: lba: fix: convert to pci_create_root_bus() for correct root bus ↵Helge Deller1-4/+4
resources (v2) commit dc7dce280a Author: Bjorn Helgaas <bhelgaas@google.com> Date: Fri Oct 28 16:27:27 2011 -0600 parisc/PCI: lba: convert to pci_create_root_bus() for correct root bus resources Supply root bus resources to pci_create_root_bus() so they're correct immediately. This fixes the problem of "early" and "header" quirks seeing incorrect root bus resources. added tests for elmmio_space.start while it should use elmmio_space.flags. This for example led to incorrect resource assignments and a non-working stifb framebuffer on most parisc machines. LBA 10:1: PCI host bridge to bus 0000:01 pci_bus 0000:01: root bus resource [io 0x12000-0x13fff] (bus address [0x2000-0x3fff]) pci_bus 0000:01: root bus resource [mem 0xfffffffffa000000-0xfffffffffbffffff] (bus address [0xfa000000-0xfbffffff]) pci_bus 0000:01: root bus resource [mem 0xfffffffff4800000-0xfffffffff4ffffff] (bus address [0xf4800000-0xf4ffffff]) pci_bus 0000:01: root bus resource [??? 0x00000001 flags 0x0] Signed-off-by: Helge Deller <deller@gmx.de> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
2013-06-01parisc/PCI: Set type for LBA bus_num resourceBjorn Helgaas1-0/+1
The non-PAT resource probing code failed to set the type of the LBA bus_num resource (30aa80da43 "parisc/PCI: register busn_res for root buses" did the corresponding thing for the PAT case). This causes incorrect resource assignments and a non-working stifb framebuffer on most parisc machines. Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Helge Deller <deller@gmx.de>
2013-06-01MAINTAINERS: update parisc architecture file listHelge Deller1-0/+8
Signed-off-by: Helge Deller <deller@gmx.de>
2013-06-01parisc: kernel: using strlcpy() instead of strcpy()Chen Gang1-1/+2
'boot_args' is an input args, and 'boot_command_line' has a fix length. So use strlcpy() instead of strcpy() to avoid memory overflow. Signed-off-by: Chen Gang <gang.chen@asianux.com> Acked-by: Kyle McMartin <kyle@mcmartin.ca> Signed-off-by: Helge Deller <deller@gmx.de>
2013-06-01parisc: rename "CONFIG_PA7100" to "CONFIG_PA7000"Paul Bolle1-1/+1
There's a Makefile line setting cflags for CONFIG_PA7100. But that Kconfig macro doesn't exist. There is a Kconfig symbol PA7000, which covers both PA7000 and PA7100 processors. So let's use the corresponding Kconfig macro. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Helge Deller <deller@gmx.de>
2013-06-01parisc: fix kernel BUG at arch/parisc/include/asm/mmzone.h:50Helge Deller1-4/+1
With CONFIG_DISCONTIGMEM=y and multiple physical memory areas, cat /proc/kpageflags triggers this kernel bug: kernel BUG at arch/parisc/include/asm/mmzone.h:50! CPU: 2 PID: 7848 Comm: cat Tainted: G D W 3.10.0-rc3-64bit #44 IAOQ[0]: kpageflags_read0x128/0x238 IAOQ[1]: kpageflags_read0x12c/0x238 RP(r2): proc_reg_read0xbc/0x130 Backtrace: [<00000000402ca2d4>] proc_reg_read0xbc/0x130 [<0000000040235bcc>] vfs_read0xc4/0x1d0 [<0000000040235f0c>] SyS_read0x94/0xf0 [<0000000040105fc0>] syscall_exit0x0/0x14 kpageflags_read() walks through the whole memory, even if some memory areas are physically not available. So, we should better not BUG on an unavailable pfn in pfn_to_nid() but just return the expected value -1 or 0. Signed-off-by: Helge Deller <deller@gmx.de>
2013-06-01parisc: memory overflow, 'name' length is too short for usingChen Gang1-1/+1
'path.bc[i]' can be asigned by PCI_SLOT() which can '> 10', so sizeof(6 * "%u:" + "%u" + '\0') may be 21. Since 'name' length is 20, it may be memory overflow. And 'path.bc[i]' is 'unsigned char' for printing, we can be sure the max length of 'name' must be less than 28. So simplify thinking, we can use 28 instead of 20 directly, and do not think of whether 'patchc.bc[i]' can '> 100'. Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Helge Deller <deller@gmx.de>
2013-06-01Merge branch 'merge' of ↵Linus Torvalds27-125/+262
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc Pull powerpc fixes from Ben Herrenschmidt: "Here are a few more fixes for powerpc 3.10. It's a bit more than I would have liked this late in the game but I suppose that's what happens with a brand new chip generation coming out. A few regression fixes, some last minute fixes for new P8 features such as transactional memory,... There's also one powerpc KVM patch that I requested that adds two missing functions to our in-kernel interrupt controller support which is itself a new 3.10 feature. These are defined by the base hypervisor specification. We didn't implement them originally because Linux doesn't use them but they are simple and I'm not comfortable having a half-implemented interface in 3.10 and having to deal with versionning etc... later when something starts needing those calls. They cannot be emulated in qemu when using in-kernel interrupt controller (not enough shared state). Just added a last minute patch to fix a typo introducing a breakage in our cputable for Power7+ processors, sorry about that, but the regression it fixes just hurt me :-)" * 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: powerpc/cputable: Fix typo on P7+ cputable entry powerpc/perf: Add missing SIER support powerpc/perf: Revert to original NO_SIPR logic powerpc/pci: Remove the unused variables in pci_process_bridge_OF_ranges powerpc/pci: Remove the stale comments of pci_process_bridge_OF_ranges powerpc/pseries: Always enable CONFIG_HOTPLUG_CPU on PSERIES SMP powerpc/kvm/book3s: Add support for H_IPOLL and H_XIRR_X in XICS emulation powerpc/32bit:Store temporary result in r0 instead of r8 powerpc/mm: Always invalidate tlb on hpte invalidate and update powerpc/pseries: Improve stream generation comments in copypage/user powerpc/pseries: Kill all prefetch streams on context switch powerpc/cputable: Fix oprofile_cpu_type on power8 powerpc/mpic: Fix irq distribution problem when MPIC_SINGLE_DEST_CPU powerpc/tm: Fix userspace stack corruption on signal delivery for active transactions powerpc/tm: Move TM abort cause codes to uapi powerpc/tm: Abort on emulation and alignment faults powerpc/tm: Update cause codes documentation powerpc/tm: Make room for hypervisor in abort cause codes
2013-06-01Merge git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pendingLinus Torvalds13-89/+126
Pull scsi target fixes from Nicholas Bellinger: "The highlights include: - Re-instate sess->wait_list in target_wait_for_sess_cmds() for active I/O shutdown handling in fabrics using se_cmd->cmd_kref - Make ib_srpt call target_sess_cmd_list_set_waiting() during session shutdown - Fix FILEIO off-by-one READ_CAPACITY bug for !S_ISBLK export - Fix iscsi-target login error heap buffer overflow (Kees) - Fix iscsi-target active I/O shutdown handling regression in v3.10-rc1 A big thanks to Kees Cook for fixing a long standing login error buffer overflow bug. All patches are CC'ed to stable with the exception of the v3.10-rc1 specific regression + other minor target cleanup." * git://git.kernel.org/pub/scm/linux/kernel/git/nab/target-pending: iscsi-target: Fix iscsit_free_cmd() se_cmd->cmd_kref shutdown handling target: Propigate up ->cmd_kref put return via transport_generic_free_cmd iscsi-target: fix heap buffer overflow on error target/file: Fix off-by-one READ_CAPACITY bug for !S_ISBLK export ib_srpt: Call target_sess_cmd_list_set_waiting during shutdown_session target: Re-instate sess_wait_list for target_wait_for_sess_cmds target: Remove unused wait_for_tasks bit in target_wait_for_sess_cmds
2013-06-01Merge tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds6-6/+25
Pull clock subsystem fixes from Mike Turquette: "A mix of small fixes affecting mostly ARM platforms as well as a discrete clock expander chip. Most fixes are corrections to lousy clock data of one form or another." * tag 'clk-fixes-for-linus' of git://git.linaro.org/people/mturquette/linux: clk: mxs: Include clk mxs header file clk: vt8500: Fix unbalanced spinlock in vt8500_dclk_set_rate() clk: si5351: Set initial clkout rate when defined in platform data. clk: si5351: Fix clkout rate computation. clk: samsung: Add CLK_IGNORE_UNUSED flag for the sysreg clocks clk: ux500: clk-sysctrl: handle clocks with no parents clk: ux500: Provide device enumeration number suffix for SMSC911x
2013-06-01Merge tag 'fbdev-for-3.10-rc4' of ↵Linus Torvalds7-5/+42
git://git.kernel.org/pub/scm/linux/kernel/git/plagnioj/linux-fbdev Pull fbdev fixes from Jean-Christophe PLAGNIOL-VILLARD: "This contains some small fixes - Atmel LCDC: fix blank the backlight on remove - ps3fb: fix compile warning - OMAPDSS: Fix crash with DT boot" * tag 'fbdev-for-3.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/plagnioj/linux-fbdev: atmel_lcdfb: blank the backlight on remove trivial: atmel_lcdfb: add missing error message OMAPDSS: Fix crash with DT boot fbdev/ps3fb: fix compile warning
2013-06-01Merge branch 'for-linus' of ↵Linus Torvalds7-16/+21
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull assorted fixes from Al Viro: "There'll be more - I'm trying to dig out from under the pile of mail (a couple of weeks of something flu-like ;-/) and there's several more things waiting for review; this is just the obvious stuff." * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: zoran: racy refcount handling in vm_ops ->open()/->close() befs_readdir(): do not increment ->f_pos if filldir tells us to stop hpfs: deadlock and race in directory lseek() qnx6: qnx6_readdir() has a braino in pos calculation fix buffer leak after "scsi: saner replacements for ->proc_info()" vfs: Fix invalid ida_remove() call
2013-06-01Merge tag 'nfs-for-3.10-4' of git://git.linux-nfs.org/projects/trondmy/linux-nfsLinus Torvalds2-1/+3
Pull two NFS client fixes from Trond Myklebust: - Fix a regression that broke NFS mounting using klibc and busybox - Stable fix to check access modes correctly on NFSv4 delegated open() * tag 'nfs-for-3.10-4' of git://git.linux-nfs.org/projects/trondmy/linux-nfs: NFS: Fix security flavor negotiation with legacy binary mounts NFSv4: Fix a thinko in nfs4_try_open_cached
2013-06-01powerpc/cputable: Fix typo on P7+ cputable entryWill Schmidt1-1/+1
Fix a typo in setting COMMON_USER2_POWER7 bits to .cpu_user_features2 cpu specs table. Signed-off-by: Will Schmidt <will_schmidt@vnet.ibm.com> Acked-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-01powerpc/perf: Add missing SIER supportMichael Ellerman1-12/+25
Commit 8f61aa3 "Add support for SIER" missed updates to siar_valid() and perf_get_data_addr(). In both cases we need to check the SIER instead of mmcra. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-01powerpc/perf: Revert to original NO_SIPR logicMichael Ellerman1-24/+6
This is a revert and then some of commit 860aad7 "Add regs_no_sipr()". This workaround was only needed on early chip versions. As before NO_SIPR becomes a static flag of the PMU struct. Signed-off-by: Michael Ellerman <michael@ellerman.id.au> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-01powerpc/pci: Remove the unused variables in pci_process_bridge_OF_rangesKevin Hao1-4/+1
The codes which ever used these two variables have gone. Throw away them too. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-01powerpc/pci: Remove the stale comments of pci_process_bridge_OF_rangesKevin Hao1-9/+0
These comments already don't apply to the current code. So just remove them. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-01powerpc/pseries: Always enable CONFIG_HOTPLUG_CPU on PSERIES SMPSrivatsa S. Bhat1-0/+2
Adam Lackorzynski reported the following build failure on !CONFIG_HOTPLUG_CPU configuration: CC arch/powerpc/kernel/rtas.o arch/powerpc/kernel/rtas.c: In function ‘rtas_cpu_state_change_mask’: arch/powerpc/kernel/rtas.c:843:4: error: implicit declaration of function ‘cpu_down’ [-Werror=implicit-function-declaration] cc1: all warnings being treated as errors make[1]: *** [arch/powerpc/kernel/rtas.o] Error 1 make: *** [arch/powerpc/kernel] Error 2 The build fails because cpu_down() is defined only under CONFIG_HOTPLUG_CPU. Looking further, the mobility code in pseries is one of the call-sites which uses rtas_ibm_suspend_me(), which in turn calls rtas_cpu_state_change_mask(). And the mobility code is unconditionally compiled-in (it does not fall under any Kconfig option). And commit 120496ac (powerpc: Bring all threads online prior to migration/hibernation) which introduced this build regression is critical for the proper functioning of the migration code. So it appears that the only solution to this problem is to enable CONFIG_HOTPLUG_CPU if SMP is enabled on PPC_PSERIES platforms. So make that change in the Kconfig. Reported-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Cc: stable@vger.kernel.org Signed-off-by: Srivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-01powerpc/kvm/book3s: Add support for H_IPOLL and H_XIRR_X in XICS emulationPaul Mackerras4-0/+34
This adds the remaining two hypercalls defined by PAPR for manipulating the XICS interrupt controller, H_IPOLL and H_XIRR_X. H_IPOLL returns information about the priority and pending interrupts for a virtual cpu, without changing any state. H_XIRR_X is like H_XIRR in that it reads and acknowledges the highest-priority pending interrupt, but it also returns the timestamp (timebase register value) from when the interrupt was first received by the hypervisor. Currently we just return the current time, since we don't do any software queueing of virtual interrupts inside the XICS emulation code. These hcalls are not currently used by Linux guests, but may be in future. Signed-off-by: Paul Mackerras <paulus@samba.org> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-01powerpc/32bit:Store temporary result in r0 instead of r8Priyanka Jain1-1/+1
Commit a9c4e541ea9b22944da356f2a9258b4eddcc953b "powerpc/kprobe: Complete kprobe and migrate exception frame" introduced a regression: While returning from exception handling in case of PREEMPT enabled, _TIF_NEED_RESCHED bit is checked in TI_FLAGS (thread_info flag) of current task. Only if this bit is set, it should continue with the process of calling preempt_schedule_irq() to schedule highest priority task if available. Current code assumes that r8 contains TI_FLAGS and check this for _TIF_NEED_RESCHED, but as r8 is modified in the code which executes before this check, r8 no longer contains the expected TI_FLAGS information. As a result check for comparison with _TIF_NEED_RESCHED was failing even if NEED_RESCHED bit is set in the current thread_info flag. Due to this, preempt_schedule_irq() and in turn scheduler was not getting called even if highest priority task is ready for execution. So, store temporary results in r0 instead of r8 to prevent r8 from getting modified as subsequent code is dependent on its value. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> CC: <stable@vger.kernel.org> [v3.7+] Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-01powerpc/mm: Always invalidate tlb on hpte invalidate and updateAneesh Kumar K.V1-8/+22
If a hash bucket gets full, we "evict" a more/less random entry from it. When we do that we don't invalidate the TLB (hpte_remove) because we assume the old translation is still technically "valid". This implies that when we are invalidating or updating pte, even if HPTE entry is not valid we should do a tlb invalidate. This was a regression introduced by b1022fbd293564de91596b8775340cf41ad5214c Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2013-06-01powerpc/pseries: Improve stream generation comments in copypage/userMichael Neuling2-13/+18
No code changes, just documenting what's happening a little better. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>