path: root/arch/xtensa/include/asm/atomic.h
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2015-09-23atomic, arch: Audit atomic_{read,set}()Peter Zijlstra1-2/+2
This patch makes sure that atomic_{read,set}() are at least {READ,WRITE}_ONCE(). We already had the 'requirement' that atomic_read() should use ACCESS_ONCE(), and most archs had this, but a few were lacking. All are now converted to use READ_ONCE(). And, by a symmetry and general paranoia argument, upgrade atomic_set() to use WRITE_ONCE(). Signed-off-by: Peter Zijlstra (Intel) <> Cc: Andrew Morton <> Cc: Dmitry Vyukov <> Cc: Linus Torvalds <> Cc: Paul E. McKenney <> Cc: Peter Zijlstra <> Cc: Thomas Gleixner <> Cc: Cc: Cc: Cc: Signed-off-by: Ingo Molnar <>
2015-09-03Merge branch 'locking-core-for-linus' of ↵Linus Torvalds1-69/+4
git:// Pull locking and atomic updates from Ingo Molnar: "Main changes in this cycle are: - Extend atomic primitives with coherent logic op primitives (atomic_{or,and,xor}()) and deprecate the old partial APIs (atomic_{set,clear}_mask()) The old ops were incoherent with incompatible signatures across architectures and with incomplete support. Now every architecture supports the primitives consistently (by Peter Zijlstra) - Generic support for 'relaxed atomics': - _acquire/release/relaxed() flavours of xchg(), cmpxchg() and {add,sub}_return() - atomic_read_acquire() - atomic_set_release() This came out of porting qwrlock code to arm64 (by Will Deacon) - Clean up the fragile static_key APIs that were causing repeat bugs, by introducing a new one: DEFINE_STATIC_KEY_TRUE(name); DEFINE_STATIC_KEY_FALSE(name); which define a key of different types with an initial true/false value. Then allow: static_branch_likely() static_branch_unlikely() to take a key of either type and emit the right instruction for the case. To be able to know the 'type' of the static key we encode it in the jump entry (by Peter Zijlstra) - Static key self-tests (by Jason Baron) - qrwlock optimizations (by Waiman Long) - small futex enhancements (by Davidlohr Bueso) - ... and misc other changes" * 'locking-core-for-linus' of git:// (63 commits) jump_label/x86: Work around asm build bug on older/backported GCCs locking, ARM, atomics: Define our SMP atomics in terms of _relaxed() operations locking, include/llist: Use linux/atomic.h instead of asm/cmpxchg.h locking/qrwlock: Make use of _{acquire|release|relaxed}() atomics locking/qrwlock: Implement queue_write_unlock() using smp_store_release() locking/lockref: Remove homebrew cmpxchg64_relaxed() macro definition locking, asm-generic: Add _{relaxed|acquire|release}() variants for 'atomic_long_t' locking, asm-generic: Rework atomic-long.h to avoid bulk code duplication locking/atomics: Add _{acquire|release|relaxed}() variants of some atomic operations locking, compiler.h: Cast away attributes in the WRITE_ONCE() magic locking/static_keys: Make verify_keys() static jump label, locking/static_keys: Update docs locking/static_keys: Provide a selftest jump_label: Provide a self-test s390/uaccess, locking/static_keys: employ static_branch_likely() x86, tsc, locking/static_keys: Employ static_branch_likely() locking/static_keys: Add selftest locking/static_keys: Add a new static_key interface locking/static_keys: Rework update logic locking/static_keys: Add static_key_{en,dis}able() helpers ...
2015-08-17xtensa: implement fake NMIMax Filippov1-5/+5
In case perf IRQ is the highest of the medium-level IRQs, and is alone on its level, it may be treated as NMI: - LOCKLEVEL is defined to be one level less than EXCM level, - IRQ masking never lowers current IRQ level, - new fake exception cause code, EXCCAUSE_MAPPED_NMI is assigned to that IRQ; new second level exception handler, do_nmi, assigned to it handles it as NMI, - atomic operations in configurations without s32c1i still need to mask all interrupts. Cc: Peter Zijlstra <> Acked-by: Peter Zijlstra (Intel) <> Signed-off-by: Max Filippov <>
2015-07-27atomic: Collapse all atomic_{set,clear}_mask definitionsPeter Zijlstra1-10/+0
Move the now generic definitions of atomic_{set,clear}_mask() into linux/atomic.h to avoid endless and pointless repetition. Also, provide an atomic_andnot() wrapper for those few archs that can implement that. Signed-off-by: Peter Zijlstra (Intel) <> Signed-off-by: Thomas Gleixner <>
2015-07-27atomic: Provide atomic_{or,xor,and}Peter Zijlstra1-2/+0
Implement atomic logic ops -- atomic_{or,xor,and}. These will replace the atomic_{set,clear}_mask functions that are available on some archs. Signed-off-by: Peter Zijlstra (Intel) <> Signed-off-by: Thomas Gleixner <>
2015-07-27xtensa: Provide atomic_{or,xor,and}Peter Zijlstra1-69/+16
Implement atomic logic ops -- atomic_{or,xor,and}. These will replace the atomic_{set,clear}_mask functions that are available on some archs. Signed-off-by: Peter Zijlstra (Intel) <> Signed-off-by: Thomas Gleixner <>
2014-10-03locking,arch: Use ACCESS_ONCE() instead of cast to volatile in atomic_read()Pranith Kumar1-1/+1
Use the much more reader friendly ACCESS_ONCE() instead of the cast to volatile. This is purely a stylistic change. Signed-off-by: Pranith Kumar <> Acked-by: Jesper Nilsson <> Acked-by: Hans-Christian Egtvedt <> Acked-by: Max Filippov <> Signed-off-by: Peter Zijlstra (Intel) <> Cc: Linus Torvalds <> Cc: Link: Signed-off-by: Ingo Molnar <>
2014-08-14locking,arch,xtensa: Fold atomic_opsPeter Zijlstra1-151/+82
Many of the atomic op implementations are the same except for one instruction; fold the lot into a few CPP macros and reduce LoC. This also prepares for easy addition of new ops. Signed-off-by: Peter Zijlstra <> Cc: Chris Zankel <> Cc: Linus Torvalds <> Cc: Max Filippov <> Cc: Geert Uytterhoeven <> Cc: Paul E. McKenney <> Cc: Link: Signed-off-by: Ingo Molnar <>
2014-04-18arch,xtensa: Convert smp_mb__*()Peter Zijlstra1-6/+1
Xtensa SMP has compare-and-swap which is fully serializing, therefore its exising smp_mb__{before,after}_clear_bit() appear unduly heavy. Implement the new barriers as barrier(). Signed-off-by: Peter Zijlstra <> Acked-by: Paul E. McKenney <> Link: Cc: Chris Zankel <> Cc: Geert Uytterhoeven <> Cc: Linus Torvalds <> Cc: Mathieu Desnoyers <> Cc: Max Filippov <> Cc: Cc: Signed-off-by: Ingo Molnar <>
2013-02-23xtensa: dispatch medium-priority interruptsMarc Gauthier1-3/+3
Add support for dispatching medium-priority interrupts, that is, interrupts of priority levels 2 to EXCM_LEVEL. IRQ handling may be preempted by higher priority IRQ. Signed-off-by: Marc Gauthier <> Signed-off-by: Max Filippov <> Signed-off-by: Chris Zankel <>
2012-12-18xtensa: add s32c1i-based atomic ops implementationsMax Filippov1-85/+186
Signed-off-by: Max Filippov <> Signed-off-by: Chris Zankel <>
2012-10-15xtensa: reorganize SR referencingMax Filippov1-6/+6
- reference SRs by names where possible, not by numbers; - get rid of __stringify around SR names where possible; - remove unneeded SR names from asm/regs.h; - add SREG_ prefix to remaining SR names; Signed-off-by: Max Filippov <> Signed-off-by: Chris Zankel <>
2012-03-28Disintegrate asm/system.h for XtensaDavid Howells1-1/+1
Disintegrate asm/system.h for Xtensa. Signed-off-by: David Howells <> cc: Chris Zankel <>
2011-07-26atomic: cleanup asm-generic atomic*.h inclusionArun Sharma1-1/+0
After changing all consumers of atomics to include <linux/atomic.h>, we ran into some compile time errors due to this dependency chain: linux/atomic.h -> asm/atomic.h -> asm-generic/atomic-long.h where atomic-long.h could use funcs defined later in linux/atomic.h without a prototype. This patches moves the code that includes asm-generic/atomic*.h to linux/atomic.h. Archs that need <asm-generic/atomic64.h> need to select CONFIG_GENERIC_ATOMIC64 from now on (some of them used to include it unconditionally). Compile tested on i386 and x86_64 with allnoconfig. Signed-off-by: Arun Sharma <> Cc: Eric Dumazet <> Cc: Ingo Molnar <> Cc: David Miller <> Acked-by: Mike Frysinger <> Signed-off-by: Andrew Morton <> Signed-off-by: Linus Torvalds <>
2011-07-26atomic: move atomic_add_unless to generic codeArun Sharma1-4/+4
This is in preparation for more generic atomic primitives based on __atomic_add_unless. Signed-off-by: Arun Sharma <> Signed-off-by: Hans-Christian Egtvedt <> Reviewed-by: Eric Dumazet <> Cc: Ingo Molnar <> Cc: David Miller <> Acked-by: Mike Frysinger <> Signed-off-by: Andrew Morton <> Signed-off-by: Linus Torvalds <>
2011-07-26atomic: use <linux/atomic.h>Arun Sharma1-1/+0
This allows us to move duplicated code in <asm/atomic.h> (atomic_inc_not_zero() for now) to <linux/atomic.h> Signed-off-by: Arun Sharma <> Reviewed-by: Eric Dumazet <> Cc: Ingo Molnar <> Cc: David Miller <> Cc: Eric Dumazet <> Acked-by: Mike Frysinger <> Signed-off-by: Andrew Morton <> Signed-off-by: Linus Torvalds <>
2010-05-17atomic_t: Cast to volatile when accessing atomic variablesAnton Blanchard1-1/+1
In preparation for removing volatile from the atomic_t definition, this patch adds a volatile cast to all the atomic read functions. Signed-off-by: Anton Blanchard <> Signed-off-by: Linus Torvalds <>
2009-06-11asm-generic: rename atomic.h to atomic-long.hArnd Bergmann1-1/+1
The existing asm-generic/atomic.h only defines the atomic_long type. This renames it to atomic-long.h so we have a place to add a truly generic atomic.h that can be used on all non-SMP systems. Signed-off-by: Remis Lima Baima <> Signed-off-by: Arnd Bergmann <> Acked-by: Ingo Molnar <>
2009-01-07Merge git:// Torvalds1-0/+299
* git:// xtensa: Update platform files to reflect new location of the header files. xtensa: switch to packed struct unaligned access implementation xtensa: Add xt2000 support files. xtensa: move headers files to arch/xtensa/include xtensa: use the new byteorder headers
2008-11-06xtensa: move headers files to arch/xtensa/includeChris Zankel1-0/+300
Move all header files for xtensa to arch/xtensa/include and platform and variant header files to the appropriate arch/xtensa/platforms/ and arch/xtensa/variants/ directories. Moving the files gets also rid of all uses of symlinks in the Makefile. This has been completed already for the majority of the architectures and xtensa is one out of six missing. Signed-off-by: Sam Ravnborg <> Signed-off-by: Chris Zankel <>