summaryrefslogtreecommitdiff
path: root/drivers/mtd/nand
AgeCommit message (Collapse)AuthorFilesLines
2016-05-27Merge tag 'for-linus-20160527' of git://git.infradead.org/linux-mtdLinus Torvalds2-29/+9
Pull MTD fixes from Brian Norris: "We've already noticed a few flaws in the MTD work for v4.7-rc1: - The Atmel folks got ahead of themselves on trying to support their latest hardware and were working off incorrect documentation. Fix up the NAND driver to get this correct. - Fix up device tree example documentation to use the latest recommendations for describing NAND ECC algorithms" * tag 'for-linus-20160527' of git://git.infradead.org/linux-mtd: Documentation: dt: mtd: drop "soft_bch" from example Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"
2016-05-25Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"Wenyou Yang2-29/+9
This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy line edge status bit. It is a datasheet bug. Cc: <stable@vger.kernel.org> Fixes: commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-05-24Merge tag 'for-linus-20160523' of git://git.infradead.org/linux-mtdLinus Torvalds42-1994/+2680
Pull MTD updates from Brian Norris: "First cycle with Boris as NAND maintainer! Many (most) bullets stolen from him. Generic: - Migrated NAND LED trigger to be a generic MTD trigger NAND: - Introduction of the "ECC algorithm" concept, to avoid overloading the ECC mode field too much more - Replaced the nand_ecclayout infrastructure with something a little more flexible (finally!) and future proof - Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some of this into their own tree as well - Prepare the sunxi NAND driver to receive DMA support - Handle bitflips in erased pages on GPMI revisions that do not support this in hardware. SPI NOR: - Start using the spi_flash_read() API for SPI drivers that support it (i.e., SPI drivers with special memory-mapped flash modes) And other small scattered improvments" * tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits) mtd: spi-nor: support GigaDevice gd25lq64c mtd: nand_bch: fix spelling of "probably" mtd: brcmnand: respect ECC algorithm set by NAND subsystem gpmi-nand: Handle ECC Errors in erased pages Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value mtd: nand: add support for "nand-ecc-algo" DT property mtd: mtd: drop NAND_ECC_SOFT_BCH enum value mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping mtd: nand: read ECC algorithm from the new field mtd: nand: fsmc: validate ECC setup by checking algorithm directly mtd: nand: set ECC algorithm to Hamming on fallback staging: mt29f_spinand: set ECC algorithm explicitly CRIS v32: nand: set ECC algorithm explicitly mtd: nand: atmel: set ECC algorithm explicitly mtd: nand: davinci: set ECC algorithm explicitly mtd: nand: bf5xx: set ECC algorithm explicitly mtd: nand: omap2: Fix high memory dma prefetch transfer mtd: nand: omap2: Start dma request before enabling prefetch mtd: nandsim: add __init attribute mtd: nand: move of_get_nand_xxx() helpers into nand_base.c ...
2016-05-16Merge branch 'for-next' of ↵Linus Torvalds1-28/+1
git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds Pull LED updates from Jacek Anaszewski: "In this merge cycle we had an interaction with MTD subsystem, that included converting drivers/mtd/nand/nand_base.c to use newly introduced MTD (NAND/NOR) LED trigger instead of implementing it on its own. Related MTD patches are intended to be merged through the LED tree, before MTD tree is merged, since further MTD development is based on those modifications. Summary: LEDs: - Introduce a kernel panic LED trigger - Introduce a MTD (NAND/NOR) trigger - led-tca6507: silence an uninitialized variable warning - ledtrig-ide-disk: Move ide_blink_delay to ledtrig_ide_activity() - leds-ss4200: Add depend on x86 arch - leds-ss4200: add DMI data for FSC SCALEO Home Server - leds-triggers: Allow to switch the trigger to "panic" on a kernel panic - devicetree: leds: Introduce "panic-indicator" optional property - leds-gpio: Support the "panic-indicator" firmware property MTD: - Uninline mtd_write_oob and move it to mtdcore.c - Remove the "nand-disk" LED trigger - Hook I/O activity to the MTD LED trigger" * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/j.anaszewski/linux-leds: leds: gpio: Support the "panic-indicator" firmware property devicetree: leds: Introduce "panic-indicator" optional property leds: triggers: Allow to switch the trigger to "panic" on a kernel panic leds: ss4200: add DMI data for FSC SCALEO Home Server leds: ss4200: Add depend on x86 arch leds: ledtrig-ide-disk: Move ide_blink_delay to ledtrig_ide_activity() leds: tca6507: silence an uninitialized variable warning mtd: Hook I/O activity to the MTD LED trigger mtd: nand: Remove the "nand-disk" LED trigger leds: trigger: Introduce a MTD (NAND/NOR) trigger mtd: Uninline mtd_write_oob and move it to mtdcore.c leds: trigger: Introduce a kernel panic LED trigger
2016-05-06mtd: nand_bch: fix spelling of "probably"Brian Norris1-1/+1
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05Merge tag 'nand/for-4.7' of github.com:linux-nand/linuxBrian Norris42-2021/+2680
Updates from Boris Brezillon: This pull request contains the following infrastructure changes: * introduction of the ECC algo concept to extend the ECC mode one * replacement of the nand_ecclayout infrastructure by something more future-proof. * addition of an mtd-activity led trigger to replace the nand-activity one And a bunch of specific NAND driver improvements/fixes. Here are the changes that are worth mentioning: * rework of the OMAP GPMC and NAND drivers * prepare the sunxi NAND driver to receive DMA support * handle bitflips in erased pages on GPMI revisions that do not support this in hardware. * tag 'nand/for-4.7' of github.com:linux-nand/linux: (152 commits) mtd: brcmnand: respect ECC algorithm set by NAND subsystem gpmi-nand: Handle ECC Errors in erased pages Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value mtd: nand: add support for "nand-ecc-algo" DT property mtd: mtd: drop NAND_ECC_SOFT_BCH enum value mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping mtd: nand: read ECC algorithm from the new field mtd: nand: fsmc: validate ECC setup by checking algorithm directly mtd: nand: set ECC algorithm to Hamming on fallback staging: mt29f_spinand: set ECC algorithm explicitly CRIS v32: nand: set ECC algorithm explicitly mtd: nand: atmel: set ECC algorithm explicitly mtd: nand: davinci: set ECC algorithm explicitly mtd: nand: bf5xx: set ECC algorithm explicitly mtd: nand: omap2: Fix high memory dma prefetch transfer mtd: nand: omap2: Start dma request before enabling prefetch mtd: nandsim: add __init attribute mtd: nand: move of_get_nand_xxx() helpers into nand_base.c mtd: nand: sh_flctl: rely on generic DT parsing done in nand_scan_ident() mtd: nand: mxc: rely on generic DT parsing done in nand_scan_ident() ...
2016-05-05mtd: brcmnand: respect ECC algorithm set by NAND subsystemBrian Norris1-1/+23
This is more obvious than guessing based on ECC strength. It allows using NAND on devices with BCH-1 (e.g. D-Link DIR-885L). This maintains DT backward compatibility by defaulting to Hamming if a 1-bit ECC algorithm is specified without a corresponding algorithm selection. i.e., to use BCH-1, you must specify: nand-ecc-strength = <1>; nand-ecc-step-size = <512>; nand-ecc-algo = "bch"; Also adds a check to ensure we haven't allowed someone to get by with SW ECC. If we want to support SW ECC, we need to refactor some other pieces of this driver. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05gpmi-nand: Handle ECC Errors in erased pagesMarkus Pargmann1-5/+73
ECC is only calculated for written pages. As erased pages are not actively written the ECC is always invalid. For this purpose the Hardware BCH unit is able to check for erased pages and does not raise an ECC error in this case. This behaviour can be influenced using the BCH_MODE register which sets the number of allowed bitflips in an erased page. Unfortunately the unit is not capable of fixing the bitflips in memory. To avoid complete software checks for erased pages, we can simply check buffers with uncorrectable ECC errors because we know that any erased page with errors is uncorrectable by the BCH unit. This patch adds the generic nand_check_erased_ecc_chunk() to gpmi-nand to correct erased pages. To have the valid data in the buffer before using them, this patch moves the read_page_swap_end() call before the ECC status checking for-loop. Signed-off-by: Markus Pargmann <mpa@pengutronix.de> [Squashed patches by Stefan and Boris to check ECC area] Tested-by: Stefan Christ <s.christ@phytec.de> Acked-by: Han xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: add support for "nand-ecc-algo" DT propertyRafał Miłecki1-7/+13
So far it was only possible to specify ECC algorithm using "soft" and "soft_bch" values of nand-ecc-mode prop. There wasn't a way to specify it for a hardware ECC mode. Now that we have independent field in NAND subsystem for storing info about ECC algorithm we may also add support for this new DT property. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: mtd: drop NAND_ECC_SOFT_BCH enum valueRafał Miłecki6-15/+5
This value should not be part of nand_ecc_modes_t as it specifies algorithm not a mode. We successfully managed to introduce new "algo" field which is respected now. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mappingRafał Miłecki1-1/+8
There isn't any difference between handling NAND_ECC_SOFT and NAND_ECC_SOFT_BCH now. What matters is the new field called "algo". Please note we're keeping backward DT compatibility. We are still treating "soft_bch" value as the one setting Hamming algorithm, it's just handled in of_get_nand_ecc_algo now. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: read ECC algorithm from the new fieldRafał Miłecki1-61/+85
Now we have all drivers properly setting this new field we can start using it. For a very short period of time we should support both values: NAND_ECC_SOFT and NAND_ECC_SOFT_BCH treating them the same. It's because of_get_nand_ecc_mode may still be setting NAND_ECC_SOFT_BCH. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: fsmc: validate ECC setup by checking algorithm directlyRafał Miłecki1-2/+5
NAND core sets ECC algorithm in algo field now and it should be preferred over the mode field. This also prepares driver for dropping NAND_ECC_SOFT_BCH. Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: set ECC algorithm to Hamming on fallbackRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: atmel: set ECC algorithm explicitlyRafał Miłecki1-0/+13
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: davinci: set ECC algorithm explicitlyRafał Miłecki1-0/+9
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: bf5xx: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: omap2: Fix high memory dma prefetch transferCooper Jr., Franklin1-11/+2
Based on DMA documentation and testing using high memory buffer when doing dma transfers can lead to various issues including kernel panics. To workaround this simply use cpu copy. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: omap2: Start dma request before enabling prefetchCooper Jr., Franklin1-4/+5
The prefetch engine sends a dma request once a FIFO threshold has been met. No other requests are received until the previous request is handled. Starting a dma transfer (dma_async_issue_pending) results in any previous event for the dma channel to be cleared. Therefore, starting the prefetch engine before initiating the dma transfer may result in the prefetch triggering a dma request but instead of it being handled it can end up being cleared. This will result in a hang since the code will continue to wait for the dma request to complete. By initiating the dma request before enabling the prefetch engine this race condition is avoided and no dma request are missed/cleared. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nandsim: add __init attributeJulia Lawall1-3/+3
Add __init attribute on functions that are only called from other __init functions and that are not inlined, at least with gcc version 4.8.4 on an x86 machine with allyesconfig. Currently, the functions are put in the .text.unlikely segment. Declaring them as __init will cause them to be put in the .init.text and to disappear after initialization. The result of objdump -x on the functions before the change is as follows: 000000000000059a l F .text.unlikely 0000000000000239 alloc_device 000000000000034e l F .text.unlikely 000000000000002e get_partition_name 00000000000007d3 l F .text.unlikely 00000000000005da init_nandsim And after the change it is as follows: 0000000000000029 l F .init.text 0000000000000234 alloc_device 0000000000000000 l F .init.text 0000000000000029 get_partition_name 000000000000025d l F .init.text 00000000000005d5 init_nandsim Done with the help of Coccinelle. The semantic patch checks for local static non-init functions that are called from an __init function and are not called from any other function. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: move of_get_nand_xxx() helpers into nand_base.cBoris Brezillon1-1/+93
Now that all drivers go through nand_set_flash_node() to parse the generic NAND properties, we can move all of_get_nand_xxx() helpers in to nand_base.c, make them static and remove of_mtd.c and of_mtd.h. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: sh_flctl: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon1-15/+12
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: mxc: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon1-22/+23
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: lpc32xx: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon1-16/+9
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: hisi504: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon1-11/+3
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: davinci: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon1-45/+38
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: gpmi: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon1-11/+10
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Han xu <han.xu@nxp.com>
2016-05-05mtd: nand: omap2: fix compare_const_fl.cocci warningsJulia Lawall1-1/+1
Move constants to the right of binary operators. Generated by: scripts/coccinelle/misc/compare_const_fl.cocci CC: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Julia Lawall <julia.lawall@lip6.fr> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: jz4740: Remove unused local variableMaarten ter Huurne1-1/+0
Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Acked-by: Harvey Hunt <harvey.hunt@imgtec.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: fsl_elbc: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: fsl_ifc: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: fsl_upm: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: cmx270: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: mpc5121_nfc: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: au1550nd: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: sh_flctl: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: s3c2410: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: omap2: set ECC algorithm explicitlyRafał Miłecki1-0/+1
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: kill the ecc->layout fieldBoris Brezillon2-15/+0
Now that all NAND drivers have switched to mtd_ooblayout_ops, we can kill the ecc->layout field. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: qcom: switch to mtd_ooblayout_opsBoris Brezillon1-45/+34
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Archit Taneja <architt@codeaurora.org>
2016-05-05mtd: nand: vf610: switch to mtd_ooblayout_opsBoris Brezillon1-30/+4
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Stefan Agner <stefan@agner.ch> Acked-by: Stefan Agner <stefan@agner.ch>
2016-05-05mtd: nand: sunxi: switch to mtd_ooblayout_opsBoris Brezillon1-62/+52
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: sm_common: switch to mtd_ooblayout_opsBoris Brezillon1-16/+77
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: sh_flctl: switch to mtd_ooblayout_opsBoris Brezillon1-20/+67
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: s3c2410: switch to mtd_ooblayout_opsBoris Brezillon1-5/+27
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: pxa3xx: switch to mtd_ooblayout_opsBoris Brezillon1-40/+64
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: omap2: switch to mtd_ooblayout_opsBoris Brezillon1-81/+121
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: mxc: switch to mtd_ooblayout_opsBoris Brezillon1-107/+105
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: lpc32xx: switch to mtd_ooblayout_opsBoris Brezillon2-25/+66
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: jz4780: switch to mtd_ooblayout_opsBoris Brezillon1-14/+5
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Harvey Hunt <harvey.hunt@imgtec.com>