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authorChristoph Hellwig <hch@lst.de>2010-10-04 15:29:41 +0200
committerKevin Wolf <kwolf@redhat.com>2010-10-22 14:49:35 +0200
commita58b8d5401b6064d52113f243456115d046bdd12 (patch)
treee325b5f7818062aadec21ef035140d169205bbc4
parent9b036055ef65d0ab3236dfdb0d07828cea961133 (diff)
downloadqemu-a58b8d5401b6064d52113f243456115d046bdd12.tar.gz
ide: set WCACHE supported in IDENTIFY data
ATA does not only have the WCACHE enabled bit in identify word 85, but also a WCACHE supported bit in word 82. While the Linux kernel is fine with the latter at least hdparm also needs the former before correctly displaying the cache settings. There's also a non-zero chance other operating systems are more picky in their volatile write cache detection. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
-rw-r--r--hw/ide/core.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/ide/core.c b/hw/ide/core.c
index 06b6e14e56..5ccb09cfbc 100644
--- a/hw/ide/core.c
+++ b/hw/ide/core.c
@@ -146,8 +146,8 @@ static void ide_identify(IDEState *s)
put_le16(p + 68, 120);
put_le16(p + 80, 0xf0); /* ata3 -> ata6 supported */
put_le16(p + 81, 0x16); /* conforms to ata5 */
- /* 14=NOP supported, 0=SMART supported */
- put_le16(p + 82, (1 << 14) | 1);
+ /* 14=NOP supported, 5=WCACHE supported, 0=SMART supported */
+ put_le16(p + 82, (1 << 14) | (1 << 5) | 1);
/* 13=flush_cache_ext,12=flush_cache,10=lba48 */
put_le16(p + 83, (1 << 14) | (1 << 13) | (1 <<12) | (1 << 10));
/* 14=set to 1, 1=SMART self test, 0=SMART error logging */