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authorMichael Clark <mjc@sifive.com>2018-03-04 11:15:09 +1300
committerMichael Clark <mjc@sifive.com>2018-05-06 10:39:38 +1200
commit6b01e3277e0e189a8f064b94c4f761e4efadd758 (patch)
tree71087fecc3f2d577198824f480645a6f9089915d
parent77ff5bba315d4453ae97ff90ba7698fb1ccc077c (diff)
downloadqemu-6b01e3277e0e189a8f064b94c4f761e4efadd758.tar.gz
RISC-V: Use ROM base address and size from memmap
Another case of replacing hard coded constants, this time referring to the definition in the virt machine's memmap. Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
-rw-r--r--hw/riscv/virt.c4
-rw-r--r--include/hw/riscv/virt.h2
2 files changed, 2 insertions, 4 deletions
diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c
index df06fc7207..3cc9c8090b 100644
--- a/hw/riscv/virt.c
+++ b/hw/riscv/virt.c
@@ -341,11 +341,11 @@ static void riscv_virt_board_init(MachineState *machine)
};
/* copy in the reset vector */
- copy_le32_to_phys(ROM_BASE, reset_vec, sizeof(reset_vec));
+ copy_le32_to_phys(memmap[VIRT_MROM].base, reset_vec, sizeof(reset_vec));
/* copy in the device tree */
qemu_fdt_dumpdtb(s->fdt, s->fdt_size);
- cpu_physical_memory_write(ROM_BASE + sizeof(reset_vec),
+ cpu_physical_memory_write(memmap[VIRT_MROM].base + sizeof(reset_vec),
s->fdt, s->fdt_size);
/* create PLIC hart topology configuration string */
diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h
index 2fbe808da5..655e85ddbd 100644
--- a/include/hw/riscv/virt.h
+++ b/include/hw/riscv/virt.h
@@ -23,8 +23,6 @@
#define VIRT(obj) \
OBJECT_CHECK(RISCVVirtState, (obj), TYPE_RISCV_VIRT_BOARD)
-enum { ROM_BASE = 0x1000 };
-
typedef struct {
/*< private >*/
SysBusDevice parent_obj;