diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-03 06:12:14 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2009-03-03 06:12:14 +0000 |
| commit | 0cfe11ea5fff6a62dd28f116ec5d227d682b08e7 (patch) | |
| tree | 33fa9c7a14ae4f6ec839c98c735c5214e74d6b29 | |
| parent | ef7ec1c16d184c6b7296d681aaa7e4f37cb57c6c (diff) | |
| download | qemu-0cfe11ea5fff6a62dd28f116ec5d227d682b08e7.tar.gz | |
target-ppc: improve mfcr/mtcrf
- use ctz32 instead of ffs - 1
- small optimisation of mtcrf
- add the name of both opcodes
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6669 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-ppc/translate.c | 13 | ||||
| -rw-r--r-- | target-ppc/translate_init.c | 1 |
2 files changed, 7 insertions, 7 deletions
diff --git a/target-ppc/translate.c b/target-ppc/translate.c index 8e0b2e04ed..489ba09784 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -28,6 +28,7 @@ #include "disas.h" #include "tcg-op.h" #include "qemu-common.h" +#include "host-utils.h" #include "helper.h" #define GEN_HELPER 1 @@ -3836,7 +3837,7 @@ GEN_HANDLER(mcrxr, 0x1F, 0x00, 0x10, 0x007FF801, PPC_MISC) tcg_gen_andi_tl(cpu_xer, cpu_xer, ~(1 << XER_SO | 1 << XER_OV | 1 << XER_CA)); } -/* mfcr */ +/* mfcr mfocrf */ GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC) { uint32_t crm, crn; @@ -3844,7 +3845,7 @@ GEN_HANDLER(mfcr, 0x1F, 0x13, 0x00, 0x00000801, PPC_MISC) if (likely(ctx->opcode & 0x00100000)) { crm = CRM(ctx->opcode); if (likely(crm && ((crm & (crm - 1)) == 0))) { - crn = ffs (crm) - 1; + crn = ctz32 (crm); tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], cpu_crf[7 - crn]); tcg_gen_shli_i32(cpu_gpr[rD(ctx->opcode)], cpu_gpr[rD(ctx->opcode)], crn * 4); @@ -3931,7 +3932,7 @@ GEN_HANDLER(mftb, 0x1F, 0x13, 0x0B, 0x00000001, PPC_MFTB) gen_op_mfspr(ctx); } -/* mtcrf */ +/* mtcrf mtocrf*/ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC) { uint32_t crm, crn; @@ -3940,10 +3941,10 @@ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC) if (likely((ctx->opcode & 0x00100000))) { if (crm && ((crm & (crm - 1)) == 0)) { TCGv_i32 temp = tcg_temp_new_i32(); - crn = ffs (crm) - 1; + crn = ctz32 (crm); tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]); - tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4); - tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf); + tcg_gen_shri_i32(temp, temp, crn * 4); + tcg_gen_andi_i32(cpu_crf[7 - crn], temp, 0xf); tcg_temp_free_i32(temp); } } else { diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 9127081259..6b7ab98f20 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -24,7 +24,6 @@ */ #include "dis-asm.h" -#include "host-utils.h" #include "gdbstub.h" //#define PPC_DUMP_CPU |