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authorJustin T. Gibbs <gibbs@FreeBSD.org>2010-02-10 14:35:54 -0700
committerAnthony Liguori <aliguori@us.ibm.com>2010-02-22 16:16:16 -0600
commit71e605f80313a632cc6714cde7bd240042dbdd95 (patch)
treeb6f8238005d9c3159ba9f3018b598d234f2c7e00
parent98b8d951dc5bcb94eaa309fbd362d2bb438d3ed6 (diff)
downloadqemu-71e605f80313a632cc6714cde7bd240042dbdd95.tar.gz
Fix lost serial TX interrupts. Report receive overruns.
o Implement receive overrun status. The FreeBSD uart driver relies on this status in it's probe routine to determine the size of the FIFO supported. o As per the 16550 spec, do not overwrite the RX FIFO on an RX overrun. o Do not allow TX or RX FIFO overruns to increment the data valid count beyond the size of the FIFO. o For reads of the IIR register, only clear the "TX holding register emtpy interrupt" if the read reports this interrupt. This is required by the specification and avoids losing TX interrupts when other, higher priority interrupts (usually RX) are reported first. Signed-off-by: Justin T. Gibbs <gibbs@FreeBSD.org> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
-rw-r--r--hw/serial.c28
1 files changed, 20 insertions, 8 deletions
diff --git a/hw/serial.c b/hw/serial.c
index e7538ac8ca..df67383d06 100644
--- a/hw/serial.c
+++ b/hw/serial.c
@@ -169,11 +169,19 @@ static int fifo_put(SerialState *s, int fifo, uint8_t chr)
{
SerialFIFO *f = (fifo) ? &s->recv_fifo : &s->xmit_fifo;
- f->data[f->head++] = chr;
+ /* Receive overruns do not overwrite FIFO contents. */
+ if (fifo == XMIT_FIFO || f->count < UART_FIFO_LENGTH) {
- if (f->head == UART_FIFO_LENGTH)
- f->head = 0;
- f->count++;
+ f->data[f->head++] = chr;
+
+ if (f->head == UART_FIFO_LENGTH)
+ f->head = 0;
+ }
+
+ if (f->count < UART_FIFO_LENGTH)
+ f->count++;
+ else if (fifo == RECV_FIFO)
+ s->lsr |= UART_LSR_OE;
return 1;
}
@@ -533,8 +541,10 @@ static uint32_t serial_ioport_read(void *opaque, uint32_t addr)
break;
case 2:
ret = s->iir;
+ if (ret & UART_IIR_THRI) {
s->thr_ipending = 0;
- serial_update_irq(s);
+ serial_update_irq(s);
+ }
break;
case 3:
ret = s->lcr;
@@ -544,9 +554,9 @@ static uint32_t serial_ioport_read(void *opaque, uint32_t addr)
break;
case 5:
ret = s->lsr;
- /* Clear break interrupt */
- if (s->lsr & UART_LSR_BI) {
- s->lsr &= ~UART_LSR_BI;
+ /* Clear break and overrun interrupts */
+ if (s->lsr & (UART_LSR_BI|UART_LSR_OE)) {
+ s->lsr &= ~(UART_LSR_BI|UART_LSR_OE);
serial_update_irq(s);
}
break;
@@ -629,6 +639,8 @@ static void serial_receive1(void *opaque, const uint8_t *buf, int size)
/* call the timeout receive callback in 4 char transmit time */
qemu_mod_timer(s->fifo_timeout_timer, qemu_get_clock (vm_clock) + s->char_transmit_time * 4);
} else {
+ if (s->lsr & UART_LSR_DR)
+ s->lsr |= UART_LSR_OE;
s->rbr = buf[0];
s->lsr |= UART_LSR_DR;
}