diff options
author | Paolo Bonzini <pbonzini@redhat.com> | 2014-04-29 13:10:05 +0200 |
---|---|---|
committer | Michael Roth <mdroth@linux.vnet.ibm.com> | 2014-06-26 14:57:46 -0500 |
commit | 3c1162e47121d4f511cc55bc9ffdd425d172f6f8 (patch) | |
tree | dbac902c7ceaf2b202f8e50738e7d7d3e3aff6c9 | |
parent | 73d8965bcc7cdec00dae7912f98f0db30bd1ba1b (diff) | |
download | qemu-3c1162e47121d4f511cc55bc9ffdd425d172f6f8.tar.gz |
target-i386: fix set of registers zeroed on reset
BND0-3, BNDCFGU, BNDCFGS, BNDSTATUS were not zeroed on reset, but they
should be (Intel Instruction Set Extensions Programming Reference
319433-015, pages 9-4 and 9-6). Same for YMM.
XCR0 should be reset to 1.
TSC and TSC_RESET were zeroed already by the memset, remove the explicit
assignments.
Cc: Andreas Faerber <afaerber@suse.de>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
(cherry picked from commit 05e7e819d7d159a75a46354aead95e1199b8f168)
Conflicts:
target-i386/cpu.c
target-i386/cpu.h
*removed dependency on 79e9ebeb
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
-rw-r--r-- | target-i386/cpu.c | 2 | ||||
-rw-r--r-- | target-i386/cpu.h | 4 |
2 files changed, 4 insertions, 2 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 47af9a8816..654a04e187 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -2446,6 +2446,8 @@ static void x86_cpu_reset(CPUState *s) cpu_breakpoint_remove_all(env, BP_CPU); cpu_watchpoint_remove_all(env, BP_CPU); + env->xcr0 = 1; + #if !defined(CONFIG_USER_ONLY) /* We hard-wire the BSP to the first CPU. */ if (s->cpu_index == 0) { diff --git a/target-i386/cpu.h b/target-i386/cpu.h index ea373e82dc..199f4079dc 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -801,6 +801,8 @@ typedef struct CPUX86State { XMMReg xmm_t0; MMXReg mmx_t0; + XMMReg ymmh_regs[CPU_NB_REGS]; + /* sysenter registers */ uint32_t sysenter_cs; target_ulong sysenter_esp; @@ -909,9 +911,7 @@ typedef struct CPUX86State { uint16_t fpus_vmstate; uint16_t fptag_vmstate; uint16_t fpregs_format_vmstate; - uint64_t xstate_bv; - XMMReg ymmh_regs[CPU_NB_REGS]; uint64_t xcr0; |