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| author | Richard Henderson <rth@twiddle.net> | 2012-08-22 14:59:22 -0700 |
|---|---|---|
| committer | Richard Henderson <rth@twiddle.net> | 2013-01-05 12:18:40 -0800 |
| commit | 32a44d5882ae82364a8e957a5e21cbeaaacc71a3 (patch) | |
| tree | f137bb529e280c487c4fc46a6b508c96b99a2654 | |
| parent | f3de39c485027a6b47bffb741f5209aa44052b71 (diff) | |
| download | qemu-32a44d5882ae82364a8e957a5e21cbeaaacc71a3.tar.gz | |
target-s390: Convert CLM
Signed-off-by: Richard Henderson <rth@twiddle.net>
| -rw-r--r-- | target-s390x/insn-data.def | 4 | ||||
| -rw-r--r-- | target-s390x/translate.c | 32 |
2 files changed, 23 insertions, 13 deletions
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 4714095f10..15ded9785b 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -136,6 +136,10 @@ C(0xc606, CLGHRL, RIL_b, GIE, r1_o, mri2_16u, 0, 0, 0, cmpu64) /* COMPARE LOGICAL LONG EXTENDED */ C(0xa900, CLCLE, RS_a, Z, 0, a2, 0, 0, clcle, 0) +/* COMPARE LOGICAL CHARACTERS UNDER MASK */ + C(0xbd00, CLM, RS_b, Z, r1_o, a2, 0, 0, clm, 0) + C(0xeb21, CLMY, RSY_b, LD, r1_o, a2, 0, 0, clm, 0) + C(0xeb20, CLMH, RSY_b, Z, r1_sr32, a2, 0, 0, clm, 0) /* COMPARE AND SWAP */ C(0xba00, CS, RS_a, Z, r1_o, a2, new, r1_32, cs, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index a99d3503f2..47576fac7f 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1997,19 +1997,6 @@ static void disas_s390_insn(CPUS390XState *env, DisasContext *s) op = (insn >> 16) & 0xff; disas_b9(env, s, op, r1, r2); break; - case 0xbd: /* CLM R1,M3,D2(B2) [RS] */ - insn = ld_code4(env, s->pc); - decode_rs(s, insn, &r1, &r3, &b2, &d2); - tmp = get_address(s, 0, b2, d2); - tmp32_1 = load_reg32(r1); - tmp32_2 = tcg_const_i32(r3); - potential_page_fault(s); - gen_helper_clm(cc_op, cpu_env, tmp32_1, tmp32_2, tmp); - set_cc_static(s); - tcg_temp_free_i64(tmp); - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i32(tmp32_2); - break; case 0xbe: /* STCM R1,M3,D2(B2) [RS] */ insn = ld_code4(env, s->pc); decode_rs(s, insn, &r1, &r3, &b2, &d2); @@ -2628,6 +2615,19 @@ static ExitStatus op_clcle(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_clm(DisasContext *s, DisasOps *o) +{ + TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3)); + TCGv_i32 t1 = tcg_temp_new_i32(); + tcg_gen_trunc_i64_i32(t1, o->in1); + potential_page_fault(s); + gen_helper_clm(cc_op, cpu_env, t1, m3, o->in2); + set_cc_static(s); + tcg_temp_free_i32(t1); + tcg_temp_free_i32(m3); + return NO_EXIT; +} + static ExitStatus op_cs(DisasContext *s, DisasOps *o) { int r3 = get_field(s->fields, r3); @@ -3712,6 +3712,12 @@ static void in1_r1_32u(DisasContext *s, DisasFields *f, DisasOps *o) tcg_gen_ext32u_i64(o->in1, regs[get_field(f, r1)]); } +static void in1_r1_sr32(DisasContext *s, DisasFields *f, DisasOps *o) +{ + o->in1 = tcg_temp_new_i64(); + tcg_gen_shri_i64(o->in1, regs[get_field(f, r1)], 32); +} + static void in1_r1p1(DisasContext *s, DisasFields *f, DisasOps *o) { /* ??? Specification exception: r1 must be even. */ |