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| author | Edgar E. Iglesias <edgar.iglesias@xilinx.com> | 2014-05-01 15:24:45 +0100 |
|---|---|---|
| committer | Michael Roth <mdroth@linux.vnet.ibm.com> | 2014-07-20 22:15:16 -0500 |
| commit | e40585f8f1c522d1ca38601d0a4b5dbcfc8d9589 (patch) | |
| tree | 95f0ef17ed18125a5f79a8d2b64d14adcbb27919 | |
| parent | 837e02ef07179876ca2ada2ed67d3eeaa9d3a9d7 (diff) | |
| download | qemu-e40585f8f1c522d1ca38601d0a4b5dbcfc8d9589.tar.gz | |
target-arm: A64: Handle blr lr
For linked branches, updates to the link register happen
conceptually after the read of the branch target register.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Cc: qemu-stable@nongnu.org
Message-id: 1398926097-28097-3-git-send-email-edgar.iglesias@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
(cherry picked from commit 1b505f93bcf605e7c4144fef83bd039b0d4f2576)
Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
| -rw-r--r-- | target-arm/translate-a64.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index a78036661a..e041f11812 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1432,8 +1432,10 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) switch (opc) { case 0: /* BR */ case 2: /* RET */ + tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn)); break; case 1: /* BLR */ + tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn)); tcg_gen_movi_i64(cpu_reg(s, 30), s->pc); break; case 4: /* ERET */ @@ -1449,7 +1451,6 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn) return; } - tcg_gen_mov_i64(cpu_pc, cpu_reg(s, rn)); s->is_jmp = DISAS_JUMP; } |