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authorPeter Maydell <peter.maydell@linaro.org>2017-07-24 15:33:12 +0100
committerPeter Maydell <peter.maydell@linaro.org>2017-07-31 13:05:04 +0100
commit709e4407add7acacc593cb6cdac026558c9a8fb6 (patch)
treecb62a3190dfc1a0cee398a84f8c9ab3879b8dd07
parent25dd0e77898c3e10796d4cbeb35e8af5ba6ce975 (diff)
downloadqemu-709e4407add7acacc593cb6cdac026558c9a8fb6.tar.gz
target/arm: Correct MPU trace handling of write vs execute
Correct off-by-one bug in the PSMAv7 MPU tracing where it would print a write access as "reading", an insn fetch as "writing", and a read access as "execute". Since we have an MMUAccessType enum now, we can make the code clearer in the process by using that rather than the raw 0/1/2 values. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 1500906792-18010-1-git-send-email-peter.maydell@linaro.org
-rw-r--r--target/arm/helper.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 4ed32c56b8..9ed5096098 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -8558,8 +8558,8 @@ static bool get_phys_addr(CPUARMState *env, target_ulong address,
phys_ptr, prot, fsr);
qemu_log_mask(CPU_LOG_MMU, "PMSAv7 MPU lookup for %s at 0x%08" PRIx32
" mmu_idx %u -> %s (prot %c%c%c)\n",
- access_type == 1 ? "reading" :
- (access_type == 2 ? "writing" : "execute"),
+ access_type == MMU_DATA_LOAD ? "reading" :
+ (access_type == MMU_DATA_STORE ? "writing" : "execute"),
(uint32_t)address, mmu_idx,
ret ? "Miss" : "Hit",
*prot & PAGE_READ ? 'r' : '-',