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authorBlue Swirl <blauwirbel@gmail.com>2013-01-12 12:47:07 +0000
committerBlue Swirl <blauwirbel@gmail.com>2013-01-12 12:47:07 +0000
commit63fb2590839162afdf14d7c0ee02d460766c0956 (patch)
treead180d9b3043d3b63744d916640808ccbdeed6b0
parent02e079c79cdb7ac8180f92edaed4b942ca6b7c71 (diff)
parent314e2296dc945e286b605563d7b6e6b269d29816 (diff)
downloadqemu-63fb2590839162afdf14d7c0ee02d460766c0956.tar.gz
Merge branch 'target-arm.next' of git://git.linaro.org/people/pmaydell/qemu-arm
* 'target-arm.next' of git://git.linaro.org/people/pmaydell/qemu-arm: target-arm: Fix SWI (SVC) instruction in M profile. target-arm: use type_register() instead of type_register_static()
-rw-r--r--target-arm/cpu.c2
-rw-r--r--target-arm/helper.c2
2 files changed, 2 insertions, 2 deletions
diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index 17875ed0f0..94536bb0cc 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -778,7 +778,7 @@ static void cpu_register(const ARMCPUInfo *info)
.class_size = sizeof(ARMCPUClass),
};
- type_register_static(&type_info);
+ type_register(&type_info);
}
static const TypeInfo arm_cpu_type_info = {
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 0525aec87a..66ab78e3f1 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -1736,7 +1736,7 @@ static void do_interrupt_v7m(CPUARMState *env)
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
return;
case EXCP_SWI:
- env->regs[15] += 2;
+ /* The PC already points to the next instruction. */
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SVC);
return;
case EXCP_PREFETCH_ABORT: