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authorPeter Xu <peterx@redhat.com>2016-07-14 13:56:27 +0800
committerMichael S. Tsirkin <mst@redhat.com>2016-07-21 20:43:49 +0300
commite3d9c92507df61608896a579b5b0d7c218d5353e (patch)
tree37f29b66021982aa44ee0b0ce8da96571b58e999
parent02a2cbc872df99205eeafd399f01c210e0b797c4 (diff)
downloadqemu-e3d9c92507df61608896a579b5b0d7c218d5353e.tar.gz
ioapic: register IOMMU IEC notifier for ioapic
Let IOAPIC the first consumer of x86 IOMMU IEC invalidation notifiers. This is only used for split irqchip case, when vIOMMU receives IR invalidation requests, IOAPIC will be notified to update kernel irq routes. For simplicity, we just update all IOAPIC routes, even if the invalidated entries are not IOAPIC ones. Since now we are creating IOMMUs using "-device" parameter, IOMMU device will be created after IOAPIC. We need to do the registration after machine done by leveraging machine_done notifier. Signed-off-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
-rw-r--r--hw/intc/ioapic.c31
-rw-r--r--include/hw/i386/ioapic_internal.h2
2 files changed, 33 insertions, 0 deletions
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index cfc7b7b958..2d3282a864 100644
--- a/hw/intc/ioapic.c
+++ b/hw/intc/ioapic.c
@@ -31,6 +31,7 @@
#include "sysemu/kvm.h"
#include "target-i386/cpu.h"
#include "hw/i386/apic-msidef.h"
+#include "hw/i386/x86-iommu.h"
//#define DEBUG_IOAPIC
@@ -198,6 +199,16 @@ static void ioapic_update_kvm_routes(IOAPICCommonState *s)
#endif
}
+#ifdef CONFIG_KVM
+static void ioapic_iec_notifier(void *private, bool global,
+ uint32_t index, uint32_t mask)
+{
+ IOAPICCommonState *s = (IOAPICCommonState *)private;
+ /* For simplicity, we just update all the routes */
+ ioapic_update_kvm_routes(s);
+}
+#endif
+
void ioapic_eoi_broadcast(int vector)
{
IOAPICCommonState *s;
@@ -354,6 +365,24 @@ static const MemoryRegionOps ioapic_io_ops = {
.endianness = DEVICE_NATIVE_ENDIAN,
};
+static void ioapic_machine_done_notify(Notifier *notifier, void *data)
+{
+#ifdef CONFIG_KVM
+ IOAPICCommonState *s = container_of(notifier, IOAPICCommonState,
+ machine_done);
+
+ if (kvm_irqchip_is_split()) {
+ X86IOMMUState *iommu = x86_iommu_get_default();
+ if (iommu) {
+ /* Register this IOAPIC with IOMMU IEC notifier, so that
+ * when there are IR invalidates, we can be notified to
+ * update kernel IR cache. */
+ x86_iommu_iec_register_notifier(iommu, ioapic_iec_notifier, s);
+ }
+ }
+#endif
+}
+
static void ioapic_realize(DeviceState *dev, Error **errp)
{
IOAPICCommonState *s = IOAPIC_COMMON(dev);
@@ -364,6 +393,8 @@ static void ioapic_realize(DeviceState *dev, Error **errp)
qdev_init_gpio_in(dev, ioapic_set_irq, IOAPIC_NUM_PINS);
ioapics[ioapic_no] = s;
+ s->machine_done.notify = ioapic_machine_done_notify;
+ qemu_add_machine_init_done_notifier(&s->machine_done);
}
static void ioapic_class_init(ObjectClass *klass, void *data)
diff --git a/include/hw/i386/ioapic_internal.h b/include/hw/i386/ioapic_internal.h
index 5c901ae78f..d89ea1b63b 100644
--- a/include/hw/i386/ioapic_internal.h
+++ b/include/hw/i386/ioapic_internal.h
@@ -25,6 +25,7 @@
#include "hw/hw.h"
#include "exec/memory.h"
#include "hw/sysbus.h"
+#include "qemu/notify.h"
#define MAX_IOAPICS 1
@@ -107,6 +108,7 @@ struct IOAPICCommonState {
uint8_t ioregsel;
uint32_t irr;
uint64_t ioredtbl[IOAPIC_NUM_PINS];
+ Notifier machine_done;
};
void ioapic_reset_common(DeviceState *dev);