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authorAurelien Jarno <aurelien@aurel32.net>2013-04-13 14:31:54 +0200
committerAurelien Jarno <aurelien@aurel32.net>2013-04-13 14:31:54 +0200
commit75312e745ad1b672cbabdc3022f6e7c8eff69b00 (patch)
tree5f2c92a22dbe0d149065123ea0827f5cdb76f752 /cpu-exec.c
parentd640045a3ede028293b83e57e9ae1ce4f81044b8 (diff)
parent0727b867542eea7fedfd2c53568e9782627fd3bd (diff)
downloadqemu-75312e745ad1b672cbabdc3022f6e7c8eff69b00.tar.gz
Merge branch 'mingw' of git://qemu.weilnetz.de/qemu
* 'mingw' of git://qemu.weilnetz.de/qemu: qemu-timer: move timeBeginPeriod/timeEndPeriod to os-win32 Release SMP restriction on Windows Ensure good ordering of memory instruction in cpu_exec Check effective suspension of TCG thread
Diffstat (limited to 'cpu-exec.c')
-rw-r--r--cpu-exec.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/cpu-exec.c b/cpu-exec.c
index 235ddeed78..31c089dac0 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -215,6 +215,14 @@ int cpu_exec(CPUArchState *env)
cpu_single_env = env;
+ /* As long as cpu_single_env is null, up to the assignment just above,
+ * requests by other threads to exit the execution loop are expected to
+ * be issued using the exit_request global. We must make sure that our
+ * evaluation of the global value is performed past the cpu_single_env
+ * value transition point, which requires a memory barrier as well as
+ * an instruction scheduling constraint on modern architectures. */
+ smp_mb();
+
if (unlikely(exit_request)) {
cpu->exit_request = 1;
}