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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-03-23 16:49:39 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2003-03-23 16:49:39 +0000
commit9de5e440b9f6a6c6305c0b81d1df4ddcc5a4b966 (patch)
tree718d0257eb2e9cac1196bd8ca83dfd11c15fd475 /cpu-i386.h
parent66fb9763af9cd743158957e8c9c2559d922b1c22 (diff)
downloadqemu-9de5e440b9f6a6c6305c0b81d1df4ddcc5a4b966.tar.gz
better signal/exception support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@42 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'cpu-i386.h')
-rw-r--r--cpu-i386.h13
1 files changed, 11 insertions, 2 deletions
diff --git a/cpu-i386.h b/cpu-i386.h
index 9125ecadc5..dbe18519bc 100644
--- a/cpu-i386.h
+++ b/cpu-i386.h
@@ -68,7 +68,7 @@
#define EXCP11_ALGN 18
#define EXCP12_MCHK 19
-#define EXCP_SIGNAL 256 /* async signal */
+#define EXCP_INTERRUPT 256 /* async interruption */
enum {
CC_OP_DYNAMIC, /* must use dynamic code to get cc_op */
@@ -170,9 +170,10 @@ typedef struct CPUX86State {
/* various CPU modes */
int vm86;
- /* exception handling */
+ /* exception/interrupt handling */
jmp_buf jmp_env;
int exception_index;
+ int interrupt_request;
} CPUX86State;
/* all CPU memory access use these macros */
@@ -383,11 +384,19 @@ int cpu_x86_inl(int addr);
CPUX86State *cpu_x86_init(void);
int cpu_x86_exec(CPUX86State *s);
+void cpu_x86_interrupt(CPUX86State *s);
void cpu_x86_close(CPUX86State *s);
/* needed to load some predefinied segment registers */
void cpu_x86_load_seg(CPUX86State *s, int seg_reg, int selector);
+/* you can call these signal handler from you SIGBUS and SIGSEGV
+ signal handlers to inform the virtual CPU of exceptions. non zero
+ is returned if the signal was handled by the virtual CPU. */
+struct siginfo;
+int cpu_x86_signal_handler(int host_signum, struct siginfo *info,
+ void *puc);
+
/* internal functions */
#define GEN_FLAG_CODE32_SHIFT 0