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authorBastian Koppelmann <kbastian@mail.uni-paderborn.de>2015-01-19 15:43:07 +0000
committerBastian Koppelmann <kbastian@mail.uni-paderborn.de>2015-01-27 11:48:02 +0000
commit0953225588ee30de2e92485331ad1bb3d7c7d089 (patch)
treedc174613fe64f12f8c704c4c5de9f1e79f131957 /device_tree.c
parent8fb9d0eb68376363553d81525cc526842543e2dc (diff)
downloadqemu-0953225588ee30de2e92485331ad1bb3d7c7d089.tar.gz
target-tricore: Add instructions of RRR opcode format
Add microcode generator function gen_cond_sub. Add helper functions: * ixmax/ixmin: search for the max/min value and its related index in a vector of 16-bit values. * pack: dack two data registers into an IEEE-754 single precision floating point format number. * dvadj: divide-adjust the result after dvstep instructions. * dvstep: divide a reg by a divisor, producing 8-bits of quotient at a time. OPCM_32_RRR_FLOAT -> OPCM_32_RRR_DIVIDE Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
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