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authorAvi Kivity <avi@redhat.com>2012-02-12 21:23:17 +0200
committerAvi Kivity <avi@redhat.com>2012-02-29 13:44:44 +0200
commit117712c3e48e64c763d981b0d72603ef703031fe (patch)
tree6f4ed28d9bb5da304d58b60fe97d4e3dff7c04db /exec.c
parent717cb7b259d7258063f8c4a812098a8d3adfa4b3 (diff)
downloadqemu-117712c3e48e64c763d981b0d72603ef703031fe.tar.gz
memory: move tlb flush to MemoryListener commit callback
This way, if we have several changes in a single transaction, we flush just once. Signed-off-by: Avi Kivity <avi@redhat.com>
Diffstat (limited to 'exec.c')
-rw-r--r--exec.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/exec.c b/exec.c
index 6232a39224..2171eba487 100644
--- a/exec.c
+++ b/exec.c
@@ -2625,7 +2625,6 @@ void cpu_register_physical_memory_log(MemoryRegionSection *section,
target_phys_addr_t start_addr = section->offset_within_address_space;
ram_addr_t size = section->size;
target_phys_addr_t addr, end_addr;
- CPUState *env;
ram_addr_t orig_size = size;
subpage_t *subpage;
uint16_t section_index = phys_section_add(section);
@@ -2659,13 +2658,6 @@ void cpu_register_physical_memory_log(MemoryRegionSection *section,
}
addr += TARGET_PAGE_SIZE;
} while (addr != end_addr);
-
- /* since each CPU stores ram addresses in its TLB cache, we must
- reset the modified entries */
- /* XXX: slow ! */
- for(env = first_cpu; env != NULL; env = env->next_cpu) {
- tlb_flush(env, 1);
- }
}
void qemu_register_coalesced_mmio(target_phys_addr_t addr, ram_addr_t size)
@@ -3563,6 +3555,14 @@ static void core_begin(MemoryListener *listener)
static void core_commit(MemoryListener *listener)
{
+ CPUState *env;
+
+ /* since each CPU stores ram addresses in its TLB cache, we must
+ reset the modified entries */
+ /* XXX: slow ! */
+ for(env = first_cpu; env != NULL; env = env->next_cpu) {
+ tlb_flush(env, 1);
+ }
}
static void core_region_add(MemoryListener *listener,