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| author | Peter Maydell <peter.maydell@linaro.org> | 2014-03-17 16:31:51 +0000 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2014-03-17 16:31:51 +0000 |
| commit | 2ed3ea110f47a7e3639281edb1d6483b1efce6c3 (patch) | |
| tree | 6526148735eb6a2741bff4d8c6c37e360143d4dd /fpu | |
| parent | a847f32c04538e92675c7b27f5f60d2eaad3e56c (diff) | |
| download | qemu-2ed3ea110f47a7e3639281edb1d6483b1efce6c3.tar.gz | |
target-arm: A64: Implement FCVTZS, FCVTZU in the shift-imm categories
Implement FCVTZS and FCVTZU in the shift-imm and scalar-shift-imm
categories; this completes the implementation of those two groups.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Message-id: 1394822294-14837-19-git-send-email-peter.maydell@linaro.org
Diffstat (limited to 'fpu')
0 files changed, 0 insertions, 0 deletions