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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-13 11:46:15 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-12-13 11:46:15 +0000
commit629bd74a4fcb68dbec658da455fa1143315ec646 (patch)
treed1c3764138fd1f3625725f0ab0fd15e44f400745 /fpu
parent3f911a51b20e69851e7091a076adecdae3d1b5de (diff)
downloadqemu-629bd74a4fcb68dbec658da455fa1143315ec646.tar.gz
softfloat-native: add float32_is_nan()
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6002 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'fpu')
-rw-r--r--fpu/softfloat-native.c9
-rw-r--r--fpu/softfloat-native.h1
2 files changed, 10 insertions, 0 deletions
diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c
index e58551f331..0b24bab329 100644
--- a/fpu/softfloat-native.c
+++ b/fpu/softfloat-native.c
@@ -250,6 +250,15 @@ int float32_is_signaling_nan( float32 a1)
return ( ( ( a>>22 ) & 0x1FF ) == 0x1FE ) && ( a & 0x003FFFFF );
}
+int float32_is_nan( float32 a1 )
+{
+ float32u u;
+ uint64_t a;
+ u.f = a1;
+ a = u.i;
+ return ( 0xFF800000 < ( a<<1 ) );
+}
+
/*----------------------------------------------------------------------------
| Software IEC/IEEE double-precision conversion routines.
*----------------------------------------------------------------------------*/
diff --git a/fpu/softfloat-native.h b/fpu/softfloat-native.h
index b51c0825bb..817a2a8137 100644
--- a/fpu/softfloat-native.h
+++ b/fpu/softfloat-native.h
@@ -246,6 +246,7 @@ INLINE int float32_unordered( float32 a, float32 b STATUS_PARAM)
int float32_compare( float32, float32 STATUS_PARAM );
int float32_compare_quiet( float32, float32 STATUS_PARAM );
int float32_is_signaling_nan( float32 );
+int float32_is_nan( float32 );
INLINE float32 float32_abs(float32 a)
{