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authorAurelien Jarno <aurelien@aurel32.net>2015-05-25 01:47:23 +0200
committerAlexander Graf <agraf@suse.de>2015-06-05 01:37:58 +0200
commit1f65958d9c21fd3b461f6b645e7884866313c1f3 (patch)
tree975d2480f21da2537c11a4caccb2df82f0fb8a48 /fpu
parent9bebf9863bd16cc824231ad71959a338dc1819ac (diff)
downloadqemu-1f65958d9c21fd3b461f6b645e7884866313c1f3.tar.gz
target-s390x: fix MMU index computation
The cpu_mmu_index function wrongly looks at PSW P bit to determine the MMU index, while this bit actually only control the use of priviledge instructions. The addressing mode is detected by looking at the PSW ASC bits instead. This used to work more or less correctly up to kernel 3.6 as the kernel was running in primary space and userland in secondary space. Since kernel 3.7 the default is to run the kernel in home space and userland in primary space. While the current QEMU code seems to work it open some security issues, like accessing the lowcore memory in R/W mode from a userspace process once it has been accessed by the kernel (it is then cached by the QEMU TLB). At the same time change the MMU_USER_IDX value so that it matches the value used in recent kernels. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'fpu')
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