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authorStefan Weil <sw@weilnetz.de>2013-04-12 20:53:58 +0200
committerStefan Hajnoczi <stefanha@redhat.com>2013-04-19 11:36:33 +0200
commite1fe50dcb3c86e25ce482a7f67f2ac5405bced8a (patch)
tree065342a959517395be8db91c7dca32a496cdcb6f /hw/arm/omap1.c
parentfd1ca7e0d5f76c6787428171355bcde49133c9c1 (diff)
downloadqemu-e1fe50dcb3c86e25ce482a7f67f2ac5405bced8a.tar.gz
Remove unneeded type casts
cpu_physical_memory_read, cpu_physical_memory_write take any pointer as 2nd argument without needing a type cast. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/arm/omap1.c')
-rw-r--r--hw/arm/omap1.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c
index f59f0f291a..c06c642acc 100644
--- a/hw/arm/omap1.c
+++ b/hw/arm/omap1.c
@@ -31,7 +31,7 @@ uint32_t omap_badwidth_read8(void *opaque, hwaddr addr)
uint8_t ret;
OMAP_8B_REG(addr);
- cpu_physical_memory_read(addr, (void *) &ret, 1);
+ cpu_physical_memory_read(addr, &ret, 1);
return ret;
}
@@ -41,7 +41,7 @@ void omap_badwidth_write8(void *opaque, hwaddr addr,
uint8_t val8 = value;
OMAP_8B_REG(addr);
- cpu_physical_memory_write(addr, (void *) &val8, 1);
+ cpu_physical_memory_write(addr, &val8, 1);
}
uint32_t omap_badwidth_read16(void *opaque, hwaddr addr)
@@ -49,7 +49,7 @@ uint32_t omap_badwidth_read16(void *opaque, hwaddr addr)
uint16_t ret;
OMAP_16B_REG(addr);
- cpu_physical_memory_read(addr, (void *) &ret, 2);
+ cpu_physical_memory_read(addr, &ret, 2);
return ret;
}
@@ -59,7 +59,7 @@ void omap_badwidth_write16(void *opaque, hwaddr addr,
uint16_t val16 = value;
OMAP_16B_REG(addr);
- cpu_physical_memory_write(addr, (void *) &val16, 2);
+ cpu_physical_memory_write(addr, &val16, 2);
}
uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
@@ -67,7 +67,7 @@ uint32_t omap_badwidth_read32(void *opaque, hwaddr addr)
uint32_t ret;
OMAP_32B_REG(addr);
- cpu_physical_memory_read(addr, (void *) &ret, 4);
+ cpu_physical_memory_read(addr, &ret, 4);
return ret;
}
@@ -75,7 +75,7 @@ void omap_badwidth_write32(void *opaque, hwaddr addr,
uint32_t value)
{
OMAP_32B_REG(addr);
- cpu_physical_memory_write(addr, (void *) &value, 4);
+ cpu_physical_memory_write(addr, &value, 4);
}
/* MPU OS timers */