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authorPeter Maydell <peter.maydell@linaro.org>2012-05-02 16:49:40 +0000
committerPeter Maydell <peter.maydell@linaro.org>2012-06-19 13:24:44 +0000
commit306a571a2d75e32cd2eae5486c2714b7b7792a63 (patch)
treea6e1b1e8a6587c808110024b35cc9631162ae4c7 /hw/arm11mpcore.c
parent2a29ddee82029580fa85276767f73fedc30c8a0a (diff)
downloadqemu-306a571a2d75e32cd2eae5486c2714b7b7792a63.tar.gz
hw/arm_gic: Add qdev property for GIC revision
GIC behaviour can be different between revision 1 and 2 of the architectural GIC specification; we also have to handle the legacy 11MPCore GIC, which is different again in some places. Introduce a qdev property so we can behave appropriately. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm11mpcore.c')
-rw-r--r--hw/arm11mpcore.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/arm11mpcore.c b/hw/arm11mpcore.c
index c528d7aa01..1bff3d3282 100644
--- a/hw/arm11mpcore.c
+++ b/hw/arm11mpcore.c
@@ -123,6 +123,8 @@ static int mpcore_priv_init(SysBusDevice *dev)
s->gic = qdev_create(NULL, "arm_gic");
qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu);
qdev_prop_set_uint32(s->gic, "num-irq", s->num_irq);
+ /* Request the legacy 11MPCore GIC behaviour: */
+ qdev_prop_set_uint32(s->gic, "revision", 0);
qdev_init_nofail(s->gic);
/* Pass through outbound IRQ lines from the GIC */