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authorPaolo Bonzini <pbonzini@redhat.com>2013-03-18 17:36:02 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2013-04-08 18:13:16 +0200
commit47b43a1f414c5b3eb9eb7502d0b0be0d134259ba (patch)
tree9acfd03f458083a077ac79bd462d5360916f445f /hw/arm
parent8d8b636d28a97af7bf43c3267d07f87b9530939a (diff)
downloadqemu-47b43a1f414c5b3eb9eb7502d0b0be0d134259ba.tar.gz
hw: move private headers to hw/ subdirectories.
Many headers are used only in a single directory. These can be kept in hw/. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/collie.c2
-rw-r--r--hw/arm/strongarm.c2
-rw-r--r--hw/arm/strongarm.h68
3 files changed, 70 insertions, 2 deletions
diff --git a/hw/arm/collie.c b/hw/arm/collie.c
index 76eda8e8b0..5420bb4ba8 100644
--- a/hw/arm/collie.c
+++ b/hw/arm/collie.c
@@ -12,7 +12,7 @@
#include "hw/sysbus.h"
#include "hw/boards.h"
#include "hw/arm/devices.h"
-#include "hw/strongarm.h"
+#include "strongarm.h"
#include "hw/arm.h"
#include "hw/block/flash.h"
#include "sysemu/blockdev.h"
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 0e5262d9f5..5873a3c956 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -27,7 +27,7 @@
* GNU GPL, version 2 or (at your option) any later version.
*/
#include "hw/sysbus.h"
-#include "hw/strongarm.h"
+#include "strongarm.h"
#include "qemu/error-report.h"
#include "hw/arm.h"
#include "char/char.h"
diff --git a/hw/arm/strongarm.h b/hw/arm/strongarm.h
new file mode 100644
index 0000000000..2893f94445
--- /dev/null
+++ b/hw/arm/strongarm.h
@@ -0,0 +1,68 @@
+#ifndef _STRONGARM_H
+#define _STRONGARM_H
+
+#include "exec/memory.h"
+
+#define SA_CS0 0x00000000
+#define SA_CS1 0x08000000
+#define SA_CS2 0x10000000
+#define SA_CS3 0x18000000
+#define SA_PCMCIA_CS0 0x20000000
+#define SA_PCMCIA_CS1 0x30000000
+#define SA_CS4 0x40000000
+#define SA_CS5 0x48000000
+/* system registers here */
+#define SA_SDCS0 0xc0000000
+#define SA_SDCS1 0xc8000000
+#define SA_SDCS2 0xd0000000
+#define SA_SDCS3 0xd8000000
+
+enum {
+ SA_PIC_GPIO0_EDGE = 0,
+ SA_PIC_GPIO1_EDGE,
+ SA_PIC_GPIO2_EDGE,
+ SA_PIC_GPIO3_EDGE,
+ SA_PIC_GPIO4_EDGE,
+ SA_PIC_GPIO5_EDGE,
+ SA_PIC_GPIO6_EDGE,
+ SA_PIC_GPIO7_EDGE,
+ SA_PIC_GPIO8_EDGE,
+ SA_PIC_GPIO9_EDGE,
+ SA_PIC_GPIO10_EDGE,
+ SA_PIC_GPIOX_EDGE,
+ SA_PIC_LCD,
+ SA_PIC_UDC,
+ SA_PIC_RSVD1,
+ SA_PIC_UART1,
+ SA_PIC_UART2,
+ SA_PIC_UART3,
+ SA_PIC_MCP,
+ SA_PIC_SSP,
+ SA_PIC_DMA_CH0,
+ SA_PIC_DMA_CH1,
+ SA_PIC_DMA_CH2,
+ SA_PIC_DMA_CH3,
+ SA_PIC_DMA_CH4,
+ SA_PIC_DMA_CH5,
+ SA_PIC_OSTC0,
+ SA_PIC_OSTC1,
+ SA_PIC_OSTC2,
+ SA_PIC_OSTC3,
+ SA_PIC_RTC_HZ,
+ SA_PIC_RTC_ALARM,
+};
+
+typedef struct {
+ ARMCPU *cpu;
+ MemoryRegion sdram;
+ DeviceState *pic;
+ DeviceState *gpio;
+ DeviceState *ppc;
+ DeviceState *ssp;
+ SSIBus *ssp_bus;
+} StrongARMState;
+
+StrongARMState *sa1110_init(MemoryRegion *sysmem,
+ unsigned int sdram_size, const char *rev);
+
+#endif