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authorPhilippe Mathieu-Daudé <f4bug@amsat.org>2018-02-08 13:48:03 -0300
committerPaolo Bonzini <pbonzini@redhat.com>2018-02-13 16:15:08 +0100
commit2edb443471bcbb8527518a91d3b8594f1b7cce50 (patch)
tree70c14db91150075b1eba0042f3177b9a9dc131c1 /hw/arm
parent3c675da5be8a49b5513495e32a702a1aec8e0064 (diff)
downloadqemu-2edb443471bcbb8527518a91d3b8594f1b7cce50.tar.gz
hw/arm/exynos4210: add a comment about a very similar SDHCI (Spec. v2)
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@xilinx.com> Message-Id: <20180208164818.7961-16-f4bug@amsat.org>
Diffstat (limited to 'hw/arm')
-rw-r--r--hw/arm/exynos4210.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c
index d89322c7ea..06f9d1ffa4 100644
--- a/hw/arm/exynos4210.c
+++ b/hw/arm/exynos4210.c
@@ -377,6 +377,18 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_mem)
BlockBackend *blk;
DriveInfo *di;
+ /* Compatible with:
+ * - SD Host Controller Specification Version 2.0
+ * - SDIO Specification Version 2.0
+ * - MMC Specification Version 4.3
+ * - SDMA
+ * - ADMA2
+ *
+ * As this part of the Exynos4210 is not publically available,
+ * we used the "HS-MMC Controller S3C2416X RISC Microprocessor"
+ * public datasheet which is very similar (implementing
+ * MMC Specification Version 4.0 being the only difference noted)
+ */
dev = qdev_create(NULL, TYPE_SYSBUS_SDHCI);
qdev_prop_set_uint64(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES);
qdev_init_nofail(dev);