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authorDavid Gibson <david@gibson.dropbear.id.au>2015-02-10 15:36:15 +1100
committerAlexander Graf <agraf@suse.de>2015-03-09 15:00:02 +0100
commit3c2784fc864d943ff70a2a5c9dea8e9a9b4d9e1d (patch)
tree8eac715ef1975dcc852fd67c00c300a945ac95be /hw/display
parent34f2af3d3edf9d57c27811d3780cbc0ece319625 (diff)
downloadqemu-3c2784fc864d943ff70a2a5c9dea8e9a9b4d9e1d.tar.gz
vga: Expose framebuffer byteorder as a QOM property
The VGA device model now supports having the framebuffer in either endian, and can be switched between these by the guest via a register in the qext region. However, in some cases (e.g. LE OS on the pseries machine) we have existing guest that don't know about the endian switch register, but other parts of the qemu code have better information to set a default endianness than the VGA code does of itself. In order to allow them to set a correct default endianness in these cases, without breaking abstraction walls, this patch exposes the VGA framebuffer endianness via a writable QOM property. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> [agraf: use instance_init for property exposure] Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/display')
-rw-r--r--hw/display/vga-pci.c29
1 files changed, 29 insertions, 0 deletions
diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c
index d67f748af4..aabfc23cd9 100644
--- a/hw/display/vga-pci.c
+++ b/hw/display/vga-pci.c
@@ -181,6 +181,20 @@ static void pci_vga_qext_write(void *ptr, hwaddr addr,
}
}
+static bool vga_get_big_endian_fb(Object *obj, Error **errp)
+{
+ PCIVGAState *d = DO_UPCAST(PCIVGAState, dev, PCI_DEVICE(obj));
+
+ return d->vga.big_endian_fb;
+}
+
+static void vga_set_big_endian_fb(Object *obj, bool value, Error **errp)
+{
+ PCIVGAState *d = DO_UPCAST(PCIVGAState, dev, PCI_DEVICE(obj));
+
+ d->vga.big_endian_fb = value;
+}
+
static const MemoryRegionOps pci_vga_qext_ops = {
.read = pci_vga_qext_read,
.write = pci_vga_qext_write,
@@ -234,6 +248,13 @@ static void pci_std_vga_realize(PCIDevice *dev, Error **errp)
}
}
+static void pci_std_vga_init(Object *obj)
+{
+ /* Expose framebuffer byteorder via QOM */
+ object_property_add_bool(obj, "big-endian-framebuffer",
+ vga_get_big_endian_fb, vga_set_big_endian_fb, NULL);
+}
+
static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp)
{
PCIVGAState *d = DO_UPCAST(PCIVGAState, dev, dev);
@@ -265,7 +286,13 @@ static void pci_secondary_vga_realize(PCIDevice *dev, Error **errp)
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram);
pci_register_bar(&d->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);
+}
+static void pci_secondary_vga_init(Object *obj)
+{
+ /* Expose framebuffer byteorder via QOM */
+ object_property_add_bool(obj, "big-endian-framebuffer",
+ vga_get_big_endian_fb, vga_set_big_endian_fb, NULL);
}
static void pci_secondary_vga_reset(DeviceState *dev)
@@ -324,6 +351,7 @@ static void secondary_class_init(ObjectClass *klass, void *data)
static const TypeInfo vga_info = {
.name = "VGA",
.parent = TYPE_PCI_DEVICE,
+ .instance_init = pci_std_vga_init,
.instance_size = sizeof(PCIVGAState),
.class_init = vga_class_init,
};
@@ -331,6 +359,7 @@ static const TypeInfo vga_info = {
static const TypeInfo secondary_info = {
.name = "secondary-vga",
.parent = TYPE_PCI_DEVICE,
+ .instance_init = pci_secondary_vga_init,
.instance_size = sizeof(PCIVGAState),
.class_init = secondary_class_init,
};