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authorMichael S. Tsirkin <mst@redhat.com>2009-12-10 15:23:59 +0200
committerMichael S. Tsirkin <mst@redhat.com>2009-12-23 16:34:59 +0200
commita9cbacb0d68440d4be7ccfed61f321224026bf5c (patch)
tree9c36be6867146975cee372ce0438bd8df697b824 /hw/e1000.c
parenta7b15a5cc6261629879d4d8a71bacf23f983000b (diff)
downloadqemu-a9cbacb0d68440d4be7ccfed61f321224026bf5c.tar.gz
e1000: switch to symbolic names for pci registers
No functional changes. I verified that the generated object binary does not change. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Juan Quintela <quintela@redhat.com> Acked-by: Glauber Costa <glommer@gmail.com>
Diffstat (limited to 'hw/e1000.c')
-rw-r--r--hw/e1000.c11
1 files changed, 7 insertions, 4 deletions
diff --git a/hw/e1000.c b/hw/e1000.c
index a0faf5ec81..51c9d7d81b 100644
--- a/hw/e1000.c
+++ b/hw/e1000.c
@@ -1089,12 +1089,15 @@ static int pci_e1000_init(PCIDevice *pci_dev)
pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL);
pci_config_set_device_id(pci_conf, E1000_DEVID);
- *(uint16_t *)(pci_conf+0x06) = cpu_to_le16(0x0010);
- pci_conf[0x08] = 0x03;
+ /* TODO: we have no capabilities, so why is this bit set? */
+ pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_CAP_LIST);
+ pci_conf[PCI_REVISION_ID] = 0x03;
pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET);
- pci_conf[0x0c] = 0x10;
+ /* TODO: RST# value should be 0, PCI spec 6.2.4 */
+ pci_conf[PCI_CACHE_LINE_SIZE] = 0x10;
- pci_conf[0x3d] = 1; // interrupt pin 0
+ /* TODO: RST# value should be 0 if programmable, PCI spec 6.2.4 */
+ pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0
d->mmio_index = cpu_register_io_memory(e1000_mmio_read,
e1000_mmio_write, d);