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author | Anthony Liguori <aliguori@us.ibm.com> | 2010-01-06 07:16:59 -0600 |
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committer | Anthony Liguori <aliguori@us.ibm.com> | 2010-01-06 07:16:59 -0600 |
commit | ea3fdd5d8ca8d5055942e42151480ab5611396c7 (patch) | |
tree | a01fb01d46612436a8b00d1c159273bad7597858 /hw/e1000.c | |
parent | dffbe21746fc7a8b66fbbdf15f74eefccd8edafd (diff) | |
parent | 1cd9656f27bd3b6dc85ad16adeeca88daa1aa14b (diff) | |
download | qemu-ea3fdd5d8ca8d5055942e42151480ab5611396c7.tar.gz |
Merge remote branch 'mst/for_anthony' into staging
Diffstat (limited to 'hw/e1000.c')
-rw-r--r-- | hw/e1000.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/hw/e1000.c b/hw/e1000.c index 616d685deb..fd3059ad8a 100644 --- a/hw/e1000.c +++ b/hw/e1000.c @@ -1092,12 +1092,15 @@ static int pci_e1000_init(PCIDevice *pci_dev) pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(pci_conf, E1000_DEVID); - *(uint16_t *)(pci_conf+0x06) = cpu_to_le16(0x0010); - pci_conf[0x08] = 0x03; + /* TODO: we have no capabilities, so why is this bit set? */ + pci_set_word(pci_conf + PCI_STATUS, PCI_STATUS_CAP_LIST); + pci_conf[PCI_REVISION_ID] = 0x03; pci_config_set_class(pci_conf, PCI_CLASS_NETWORK_ETHERNET); - pci_conf[0x0c] = 0x10; + /* TODO: RST# value should be 0, PCI spec 6.2.4 */ + pci_conf[PCI_CACHE_LINE_SIZE] = 0x10; - pci_conf[0x3d] = 1; // interrupt pin 0 + /* TODO: RST# value should be 0 if programmable, PCI spec 6.2.4 */ + pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0 d->mmio_index = cpu_register_io_memory(e1000_mmio_read, e1000_mmio_write, d); |