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authorAnthony Liguori <aliguori@amazon.com>2014-01-10 11:04:48 -0800
committerAnthony Liguori <aliguori@amazon.com>2014-01-10 11:04:48 -0800
commitd1819762fcf5d50f30df603eb606eb31bf62e29d (patch)
treeeb44015522c216c40f87511958fa81cb91173826 /hw/i386/pc_piix.c
parent4cddc7f44ff83ff3545059f1b8648b8bd7fe0e72 (diff)
parent5bf58abf1cb7220d9f7d8e18f113a353cd6f260d (diff)
downloadqemu-d1819762fcf5d50f30df603eb606eb31bf62e29d.tar.gz
Merge remote-tracking branch 'mst/tags/for_anthony' into staging
acpi,pci,pc,fedora,virtio fixes and enhancements This includes some Preparatory patches for cpu hotplug for q25 and memory hotplug by Igor, tests and memory mapping change by Laszlo and pci reset cleanup by Paolo. There are also some fixes for fedora and virtio: included here since they are test blockers for me. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # gpg: Signature made Mon 23 Dec 2013 08:07:18 AM PST using RSA key ID D28D5469 # gpg: Can't check signature: public key not found * mst/tags/for_anthony: target-arm: fix build with gcc 4.8.2 virtio: add back call to virtio_bus_device_unplugged piix: fix 32bit pci hole qdev: switch reset to post-order qdev: allow both pre- and post-order vists in qdev walking functions pci: clean up resetting of IRQs pci: do not export pci_bus_reset ACPI/DSDT-CPU: cleanup bogus comment ACPI: Q35 DSDT: fix CPU hotplug GPE0.2 handler acpi: ich9: allow guest to clear SCI rised by GPE acpi: factor out common pm_update_sci() into acpi core acpi: piix4: remove not needed GPE0 mask i440fx-test: verify firmware under 4G and 1M, both -bios and -pflash i440fx-test: generate temporary firmware blob i440fx-test: give each GTest case its own qtest i440fx-test: qtest_start() should be paired with qtest_end() hw/i386/pc_sysfw: support two flash drives pc_piix: document gigabyte_align piix: gigabyte alignment for ram Message-id: 1387815007-1272-1-git-send-email-mst@redhat.com Signed-off-by: Anthony Liguori <aliguori@amazon.com>
Diffstat (limited to 'hw/i386/pc_piix.c')
-rw-r--r--hw/i386/pc_piix.c19
1 files changed, 17 insertions, 2 deletions
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index 4e0dae7981..276641436e 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -61,6 +61,11 @@ static const int ide_irq[MAX_IDE_BUS] = { 14, 15 };
static bool has_pci_info;
static bool has_acpi_build = true;
static bool smbios_type1_defaults = true;
+/* Make sure that guest addresses aligned at 1Gbyte boundaries get mapped to
+ * host addresses aligned at 1Gbyte boundaries. This way we can use 1GByte
+ * pages in the host.
+ */
+static bool gigabyte_align = true;
/* PC hardware initialisation */
static void pc_init1(QEMUMachineInitArgs *args,
@@ -106,9 +111,17 @@ static void pc_init1(QEMUMachineInitArgs *args,
kvmclock_create();
}
+ /* Check whether RAM fits below 4G (leaving 1/2 GByte for IO memory).
+ * If it doesn't, we need to split it in chunks below and above 4G.
+ * In any case, try to make sure that guest addresses aligned at
+ * 1G boundaries get mapped to host addresses aligned at 1G boundaries.
+ * For old machine types, use whatever split we used historically to avoid
+ * breaking migration.
+ */
if (args->ram_size >= 0xe0000000) {
- above_4g_mem_size = args->ram_size - 0xe0000000;
- below_4g_mem_size = 0xe0000000;
+ ram_addr_t lowmem = gigabyte_align ? 0xc0000000 : 0xe0000000;
+ above_4g_mem_size = args->ram_size - lowmem;
+ below_4g_mem_size = lowmem;
} else {
above_4g_mem_size = 0;
below_4g_mem_size = args->ram_size;
@@ -157,6 +170,7 @@ static void pc_init1(QEMUMachineInitArgs *args,
if (pci_enabled) {
pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, &isa_bus, gsi,
system_memory, system_io, args->ram_size,
+ below_4g_mem_size,
above_4g_mem_size,
pci_memory, ram_memory);
} else {
@@ -245,6 +259,7 @@ static void pc_init_pci(QEMUMachineInitArgs *args)
static void pc_compat_1_7(QEMUMachineInitArgs *args)
{
smbios_type1_defaults = false;
+ gigabyte_align = false;
}
static void pc_compat_1_6(QEMUMachineInitArgs *args)