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authorAlexander Graf <agraf@suse.de>2011-02-01 15:51:31 +0100
committerKevin Wolf <kwolf@redhat.com>2011-02-07 11:40:31 +0100
commit2c4b9d0ea42c27ec2112e437a0fa954afe73bd23 (patch)
treea89f670d2938ba00365e2a8a5a0b3ac5707e2cc1 /hw/ide/ahci.h
parent760c3e44d3a1d8a7e9d22f0429b1805d1c688178 (diff)
downloadqemu-2c4b9d0ea42c27ec2112e437a0fa954afe73bd23.tar.gz
ahci: make number of ports runtime determined
Different AHCI controllers have a different number of ports, so the core shouldn't care about the amount of ports available. This patch makes the number of ports available to the AHCI core runtime configurable, allowing us to have multiple different AHCI implementations with different amounts of ports. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Diffstat (limited to 'hw/ide/ahci.h')
-rw-r--r--hw/ide/ahci.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/ide/ahci.h b/hw/ide/ahci.h
index b2786d1c07..a4560c41b6 100644
--- a/hw/ide/ahci.h
+++ b/hw/ide/ahci.h
@@ -188,11 +188,9 @@
#define AHCI_GENERIC_HOST_CONTROL_REGS_MAX_ADDR 0x20
/* Shouldn't this be 0x2c? */
-#define SATA_PORTS 4
-
#define AHCI_PORT_REGS_START_ADDR 0x100
-#define AHCI_PORT_REGS_END_ADDR (AHCI_PORT_REGS_START_ADDR + SATA_PORTS * 0x80)
#define AHCI_PORT_ADDR_OFFSET_MASK 0x7f
+#define AHCI_PORT_ADDR_OFFSET_LEN 0x80
#define AHCI_NUM_COMMAND_SLOTS 31
#define AHCI_SUPPORTED_SPEED 20
@@ -289,9 +287,10 @@ struct AHCIDevice {
};
typedef struct AHCIState {
- AHCIDevice dev[SATA_PORTS];
+ AHCIDevice *dev;
AHCIControlRegs control_regs;
int mem;
+ int ports;
qemu_irq irq;
} AHCIState;
@@ -323,7 +322,8 @@ typedef struct NCQFrame {
uint8_t reserved10;
} __attribute__ ((packed)) NCQFrame;
-void ahci_init(AHCIState *s, DeviceState *qdev);
+void ahci_init(AHCIState *s, DeviceState *qdev, int ports);
+void ahci_uninit(AHCIState *s);
void ahci_pci_map(PCIDevice *pci_dev, int region_num,
pcibus_t addr, pcibus_t size, int type);