diff options
| author | Daniel Verkamp <daniel@drv.nu> | 2011-08-27 02:12:28 -0700 |
|---|---|---|
| committer | Kevin Wolf <kwolf@redhat.com> | 2011-09-21 14:32:20 +0200 |
| commit | 465f1ab16169f5d71e52f11d4c650a50fd681030 (patch) | |
| tree | 02fee21253c82795551111e8d63f46fd7b2ba8f1 /hw/ide/ahci.h | |
| parent | 8e72506e20d9e606783de1cdb8d60dd9b9241e30 (diff) | |
| download | qemu-465f1ab16169f5d71e52f11d4c650a50fd681030.tar.gz | |
ahci: add port I/O index-data pair
Implement an I/O space index-data register pair as defined by the AHCI
spec, including the corresponding SATA PCI capability and BAR.
This allows real-mode code to access the AHCI registers; real-mode
code cannot address the memory-mapped register space because it is
beyond the first megabyte.
Signed-off-by: Daniel Verkamp <daniel@drv.nu>
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Diffstat (limited to 'hw/ide/ahci.h')
| -rw-r--r-- | hw/ide/ahci.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/hw/ide/ahci.h b/hw/ide/ahci.h index 5de986c90f..b223d2c055 100644 --- a/hw/ide/ahci.h +++ b/hw/ide/ahci.h @@ -24,7 +24,7 @@ #ifndef HW_IDE_AHCI_H #define HW_IDE_AHCI_H -#define AHCI_PCI_BAR 5 +#define AHCI_MEM_BAR_SIZE 0x1000 #define AHCI_MAX_PORTS 32 #define AHCI_MAX_SG 168 /* hardware max is 64K */ #define AHCI_DMA_BOUNDARY 0xffffffff @@ -212,6 +212,10 @@ #define RES_FIS_SDBFIS 0x58 #define RES_FIS_UFIS 0x60 +#define SATA_CAP_SIZE 0x8 +#define SATA_CAP_REV 0x2 +#define SATA_CAP_BAR 0x4 + typedef struct AHCIControlRegs { uint32_t cap; uint32_t ghc; @@ -290,6 +294,9 @@ typedef struct AHCIState { AHCIDevice *dev; AHCIControlRegs control_regs; MemoryRegion mem; + MemoryRegion idp; /* Index-Data Pair I/O port space */ + unsigned idp_offset; /* Offset of index in I/O port space */ + uint32_t idp_index; /* Current IDP index */ int ports; qemu_irq irq; } AHCIState; |