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| author | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2013-05-13 17:14:35 +0200 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2013-05-19 15:16:20 +0200 |
| commit | 118d1e4f59c36078a0d76d090d4c16deace47233 (patch) | |
| tree | f7ef4fc563b88dfec72e3d12ab63df5ffaf6f29b /hw/ide/macio.c | |
| parent | 0ba365f4a9752a82502e829a3e8cb5f03a1ffc0c (diff) | |
| download | qemu-118d1e4f59c36078a0d76d090d4c16deace47233.tar.gz | |
target-mips: set carry bit correctly in DSPControl register
First we need to clear the bit and then we set the given value.
Instruction ADDSC sets the bit and instruction ADDWC uses this bit.
Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Diffstat (limited to 'hw/ide/macio.c')
0 files changed, 0 insertions, 0 deletions