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| author | Fabian Aggeler <aggelerf@ethz.ch> | 2015-05-12 11:57:17 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-05-12 11:57:17 +0100 |
| commit | 679aa175e84f5f80b32b307fce5a6b92729e0e61 (patch) | |
| tree | 55aefc4eb7ed961e5dcfedc990521b2d5a08e756 /hw/intc/arm_gic_kvm.c | |
| parent | eb8b9530b0c618d4f2e728eae10d89239d35b0c0 (diff) | |
| download | qemu-679aa175e84f5f80b32b307fce5a6b92729e0e61.tar.gz | |
hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked
ICDDCR/GICD_CTLR is banked if the GIC has the security extensions,
and the S (or only) copy has separate enable bits for Group0 and
Group1 enable if the GIC implements interrupt groups.
EnableGroup0 (Bit [1]) in GICv1 is architecturally IMPDEF. Since this
bit (Enable Non-secure) is present in the integrated GIC of the Cortex-A9
MPCore, we support this bit in our GICv1 implementation too.
Signed-off-by: Fabian Aggeler <aggelerf@ethz.ch>
Signed-off-by: Greg Bellows <greg.bellows@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 1430502643-25909-7-git-send-email-peter.maydell@linaro.org
Message-id: 1429113742-8371-8-git-send-email-greg.bellows@linaro.org
[PMM: rewritten to store the state in a single s->ctlr uint32,
with the NS register handled as an alias of bit 1 in that value;
added vmstate version bump]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc/arm_gic_kvm.c')
| -rw-r--r-- | hw/intc/arm_gic_kvm.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index 3591ca7d5d..4260fd8f04 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -353,8 +353,8 @@ static void kvm_arm_gic_put(GICState *s) * Distributor State */ - /* s->enabled -> GICD_CTLR */ - reg = s->enabled; + /* s->ctlr -> GICD_CTLR */ + reg = s->ctlr; kvm_gicd_access(s, 0x0, 0, ®, true); /* Sanity checking on GICD_TYPER and s->num_irq, s->num_cpu */ @@ -453,9 +453,9 @@ static void kvm_arm_gic_get(GICState *s) * Distributor State */ - /* GICD_CTLR -> s->enabled */ + /* GICD_CTLR -> s->ctlr */ kvm_gicd_access(s, 0x0, 0, ®, false); - s->enabled = reg & 1; + s->ctlr = reg; /* Sanity checking on GICD_TYPER -> s->num_irq, s->num_cpu */ kvm_gicd_access(s, 0x4, 0, ®, false); |