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authorMarcel Apfelbaum <marcel.a@redhat.com>2013-10-07 10:36:39 +0300
committerMichael S. Tsirkin <mst@redhat.com>2013-10-14 17:11:45 +0300
commit9e64f8a3fcc88a508990a62ecc5a1269e41272ad (patch)
treecc9461940fb228d4b0e8cf9b945785b374a5da41 /hw/isa
parent68919cace8242363edfe8ff9b9c68b5e58c30db4 (diff)
downloadqemu-9e64f8a3fcc88a508990a62ecc5a1269e41272ad.tar.gz
hw: set interrupts using pci irq wrappers
pci_set_irq and the other pci irq wrappers use PCI_INTERRUPT_PIN config register to compute device INTx pin to assert/deassert. An irq is allocated using pci_allocate_irq wrapper only if is needed by non pci devices. Removed irq related fields from state if not used anymore. Signed-off-by: Marcel Apfelbaum <marcel.a@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/isa')
-rw-r--r--hw/isa/vt82c686.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/isa/vt82c686.c b/hw/isa/vt82c686.c
index 8fe4fcb4a1..5fb808630f 100644
--- a/hw/isa/vt82c686.c
+++ b/hw/isa/vt82c686.c
@@ -185,7 +185,7 @@ static void pm_update_sci(VT686PMState *s)
ACPI_BITMASK_POWER_BUTTON_ENABLE |
ACPI_BITMASK_GLOBAL_LOCK_ENABLE |
ACPI_BITMASK_TIMER_ENABLE)) != 0);
- qemu_set_irq(s->dev.irq[0], sci_level);
+ pci_set_irq(&s->dev, sci_level);
/* schedule a timer interruption if needed */
acpi_pm_tmr_update(&s->ar, (s->ar.pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
!(pmsts & ACPI_BITMASK_TIMER_STATUS));