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authorAvi Kivity <avi@redhat.com>2012-10-23 12:30:10 +0200
committerAnthony Liguori <aliguori@us.ibm.com>2012-10-23 08:58:25 -0500
commita8170e5e97ad17ca169c64ba87ae2f53850dab4c (patch)
tree51182ed444f0d2bf282f6bdacef43f32e5adaadf /hw/lm32_boards.c
parent50d2b4d93f45a425f15ac88bc4ec352f5c6e0bc2 (diff)
downloadqemu-a8170e5e97ad17ca169c64ba87ae2f53850dab4c.tar.gz
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Diffstat (limited to 'hw/lm32_boards.c')
-rw-r--r--hw/lm32_boards.c38
1 files changed, 19 insertions, 19 deletions
diff --git a/hw/lm32_boards.c b/hw/lm32_boards.c
index c5a62c8264..772cb8b053 100644
--- a/hw/lm32_boards.c
+++ b/hw/lm32_boards.c
@@ -32,12 +32,12 @@
typedef struct {
LM32CPU *cpu;
- target_phys_addr_t bootstrap_pc;
- target_phys_addr_t flash_base;
- target_phys_addr_t hwsetup_base;
- target_phys_addr_t initrd_base;
+ hwaddr bootstrap_pc;
+ hwaddr flash_base;
+ hwaddr hwsetup_base;
+ hwaddr initrd_base;
size_t initrd_size;
- target_phys_addr_t cmdline_base;
+ hwaddr cmdline_base;
} ResetInfo;
static void cpu_irq_handler(void *opaque, int irq, int level)
@@ -83,14 +83,14 @@ static void lm32_evr_init(QEMUMachineInitArgs *args)
int i;
/* memory map */
- target_phys_addr_t flash_base = 0x04000000;
+ hwaddr flash_base = 0x04000000;
size_t flash_sector_size = 256 * 1024;
size_t flash_size = 32 * 1024 * 1024;
- target_phys_addr_t ram_base = 0x08000000;
+ hwaddr ram_base = 0x08000000;
size_t ram_size = 64 * 1024 * 1024;
- target_phys_addr_t timer0_base = 0x80002000;
- target_phys_addr_t uart0_base = 0x80006000;
- target_phys_addr_t timer1_base = 0x8000a000;
+ hwaddr timer0_base = 0x80002000;
+ hwaddr uart0_base = 0x80006000;
+ hwaddr timer1_base = 0x8000a000;
int uart0_irq = 0;
int timer0_irq = 1;
int timer1_irq = 3;
@@ -174,22 +174,22 @@ static void lm32_uclinux_init(QEMUMachineInitArgs *args)
int i;
/* memory map */
- target_phys_addr_t flash_base = 0x04000000;
+ hwaddr flash_base = 0x04000000;
size_t flash_sector_size = 256 * 1024;
size_t flash_size = 32 * 1024 * 1024;
- target_phys_addr_t ram_base = 0x08000000;
+ hwaddr ram_base = 0x08000000;
size_t ram_size = 64 * 1024 * 1024;
- target_phys_addr_t uart0_base = 0x80000000;
- target_phys_addr_t timer0_base = 0x80002000;
- target_phys_addr_t timer1_base = 0x80010000;
- target_phys_addr_t timer2_base = 0x80012000;
+ hwaddr uart0_base = 0x80000000;
+ hwaddr timer0_base = 0x80002000;
+ hwaddr timer1_base = 0x80010000;
+ hwaddr timer2_base = 0x80012000;
int uart0_irq = 0;
int timer0_irq = 1;
int timer1_irq = 20;
int timer2_irq = 21;
- target_phys_addr_t hwsetup_base = 0x0bffe000;
- target_phys_addr_t cmdline_base = 0x0bfff000;
- target_phys_addr_t initrd_base = 0x08400000;
+ hwaddr hwsetup_base = 0x0bffe000;
+ hwaddr cmdline_base = 0x0bfff000;
+ hwaddr initrd_base = 0x08400000;
size_t initrd_max = 0x01000000;
reset_info = g_malloc0(sizeof(ResetInfo));