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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-16 21:08:06 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-09-16 21:08:06 +0000
commit5fafdf24ef2c090c164d4dc89684b3f379dbdd87 (patch)
treec0654ee63b6dac76d98b427e92ef16850a90c652 /hw/mcf5206.c
parentbd494f4cbd4187dda8cc8f4739763f24a31a4c8b (diff)
downloadqemu-5fafdf24ef2c090c164d4dc89684b3f379dbdd87.tar.gz
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/mcf5206.c')
-rw-r--r--hw/mcf5206.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/hw/mcf5206.c b/hw/mcf5206.c
index ce4676bdf1..32117ae521 100644
--- a/hw/mcf5206.c
+++ b/hw/mcf5206.c
@@ -1,4 +1,4 @@
-/*
+/*
* Motorola ColdFire MCF5206 SoC embedded peripheral emulation.
*
* Copyright (c) 2007 CodeSourcery.
@@ -58,7 +58,7 @@ static void m5206_timer_recalibrate(m5206_timer_state *s)
prescale *= 16;
if (mode == 3 || mode == 0)
- cpu_abort(cpu_single_env,
+ cpu_abort(cpu_single_env,
"m5206_timer: mode %d not implemented\n", mode);
if ((s->tmr & TMR_FRR) == 0)
cpu_abort(cpu_single_env,
@@ -354,7 +354,7 @@ static void m5206_mbar_write(m5206_mbar_state *s, uint32_t offset,
/* Internal peripherals use a variety of register widths.
This lookup table allows a single routine to handle all of them. */
-static const int m5206_mbar_width[] =
+static const int m5206_mbar_width[] =
{
/* 000-040 */ 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 2, 2, 2, 2,
/* 040-080 */ 1, 2, 2, 2, 4, 1, 2, 4, 1, 2, 4, 2, 2, 4, 2, 2,