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| author | Andreas Färber <afaerber@suse.de> | 2013-01-18 15:03:43 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:55 +0100 |
| commit | c3affe5670e5d0df8a7e06f1d6e80853633146df (patch) | |
| tree | bc2a6d0877cf7aea8821053cf6c8df10f167caa5 /hw/mips | |
| parent | d8ed887bdcd29ce2e967f8b15a6a2b6dcaa11cd5 (diff) | |
| download | qemu-c3affe5670e5d0df8a7e06f1d6e80853633146df.tar.gz | |
cpu: Pass CPUState to cpu_interrupt()
Move it to qom/cpu.h to avoid issues with include order.
Change pc_acpi_smi_interrupt() opaque to X86CPU.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/mips')
| -rw-r--r-- | hw/mips/mips_int.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/mips/mips_int.c b/hw/mips/mips_int.c index 3a78999e02..0e5e86699c 100644 --- a/hw/mips/mips_int.c +++ b/hw/mips/mips_int.c @@ -40,7 +40,7 @@ static void cpu_mips_irq_request(void *opaque, int irq, int level) } if (env->CP0_Cause & CP0Ca_IP_mask) { - cpu_interrupt(env, CPU_INTERRUPT_HARD); + cpu_interrupt(cs, CPU_INTERRUPT_HARD); } else { cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD); } |