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| author | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-17 16:28:29 +0000 |
|---|---|---|
| committer | ths <ths@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-04-17 16:28:29 +0000 |
| commit | 18c6e2ff5adc016031566f409382417f6fde626d (patch) | |
| tree | 675a465350b75b06adcb824b2f10ec350ed6dc54 /hw/mips_pica61.c | |
| parent | fcb4a419f52e538b68510a68f30d8834dd211155 (diff) | |
| download | qemu-18c6e2ff5adc016031566f409382417f6fde626d.tar.gz | |
Fix mmapped register alignment and endianness handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2694 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/mips_pica61.c')
| -rw-r--r-- | hw/mips_pica61.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/mips_pica61.c b/hw/mips_pica61.c index 9d9400a698..8e1058a791 100644 --- a/hw/mips_pica61.c +++ b/hw/mips_pica61.c @@ -125,7 +125,7 @@ void mips_pica61_init (int ram_size, int vga_ram_size, int boot_device, /* PC style IRQ (i8259/i8254) and DMA (i8257) */ /* The PIC is attached to the MIPS CPU INT0 pin */ i8259 = i8259_init(env->irq[2]); - rtc_mm_init(0x80004070, i8259[14]); + rtc_mm_init(0x80004070, 1, i8259[14]); pit_init(0x40, 0); /* Keyboard (i8042) */ |