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authorAlexey Kardashevskiy <aik@ozlabs.ru>2012-07-19 10:35:07 +1000
committerMichael S. Tsirkin <mst@redhat.com>2012-07-19 17:56:42 +0300
commit932d4a42afa28829fadf3cbfbb0507cc09aafd8b (patch)
treeaac382560039bf5e0404f6ce138db06b60e78c39 /hw/msi.c
parent0ae1625177aba9ac70beb1556615530ddb18086d (diff)
downloadqemu-932d4a42afa28829fadf3cbfbb0507cc09aafd8b.tar.gz
msi/msix: added API to set MSI message address and data
Added (msi|msix)_set_message() function for whoever might want to use them. Currently msi_notify()/msix_notify() write to these vectors to signal the guest about an interrupt so the correct values have to written there by the guest or QEMU. For example, POWER guest never initializes MSI/MSIX vectors, instead it uses RTAS hypercalls. So in order to support MSIX for virtio-pci on POWER we have to initialize MSI/MSIX message from QEMU. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/msi.c')
-rw-r--r--hw/msi.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/hw/msi.c b/hw/msi.c
index 52332041e7..e2273a09ae 100644
--- a/hw/msi.c
+++ b/hw/msi.c
@@ -105,6 +105,23 @@ static inline uint8_t msi_pending_off(const PCIDevice* dev, bool msi64bit)
return dev->msi_cap + (msi64bit ? PCI_MSI_PENDING_64 : PCI_MSI_PENDING_32);
}
+/*
+ * Special API for POWER to configure the vectors through
+ * a side channel. Should never be used by devices.
+ */
+void msi_set_message(PCIDevice *dev, MSIMessage msg)
+{
+ uint16_t flags = pci_get_word(dev->config + msi_flags_off(dev));
+ bool msi64bit = flags & PCI_MSI_FLAGS_64BIT;
+
+ if (msi64bit) {
+ pci_set_quad(dev->config + msi_address_lo_off(dev), msg.address);
+ } else {
+ pci_set_long(dev->config + msi_address_lo_off(dev), msg.address);
+ }
+ pci_set_word(dev->config + msi_data_off(dev, msi64bit), msg.data);
+}
+
bool msi_enabled(const PCIDevice *dev)
{
return msi_present(dev) &&