diff options
| author | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-04 11:42:11 +0000 |
|---|---|---|
| committer | balrog <balrog@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-04 11:42:11 +0000 |
| commit | b854bc196f5c4b4e3299c0b0ee63cf828ece9e77 (patch) | |
| tree | 8a8025f3f6b6bbae44a46fd34d43017d5a7d8fe0 /hw/omap.h | |
| parent | e616a7e821c477fdb88cc422a8d925e0028e93b5 (diff) | |
| download | qemu-b854bc196f5c4b4e3299c0b0ee63cf828ece9e77.tar.gz | |
Make accesses with wrong width also work as apparently real hardware allows them when the fault is disabled.
Fix DMA register writes if target_phys_addr_t is 64-bit.
Make more functions static.
A timer hack to make PalmOS run in finite time (uses very short timer periods, much shorter than clocksource tick).
Re-calculate internal clock rates on start-up.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3527 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/omap.h')
| -rw-r--r-- | hw/omap.h | 15 |
1 files changed, 12 insertions, 3 deletions
@@ -646,14 +646,23 @@ void omap_badwidth_write32(void *opaque, target_phys_addr_t addr, # define OMAP_RO_REG(paddr) \ printf("%s: Read-only register " OMAP_FMT_plx "\n", \ __FUNCTION__, paddr) -# define OMAP_8B_REG(paddr) \ + +# define TCMI_VERBOSE 1 + +# ifdef TCMI_VERBOSE +# define OMAP_8B_REG(paddr) \ printf("%s: 8-bit register " OMAP_FMT_plx "\n", \ __FUNCTION__, paddr) -# define OMAP_16B_REG(paddr) \ +# define OMAP_16B_REG(paddr) \ printf("%s: 16-bit register " OMAP_FMT_plx "\n", \ __FUNCTION__, paddr) -# define OMAP_32B_REG(paddr) \ +# define OMAP_32B_REG(paddr) \ printf("%s: 32-bit register " OMAP_FMT_plx "\n", \ __FUNCTION__, paddr) +# else +# define OMAP_8B_REG(paddr) +# define OMAP_16B_REG(paddr) +# define OMAP_32B_REG(paddr) +# endif #endif /* hw_omap_h */ |