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| author | Jia Liu <proljc@gmail.com> | 2013-08-21 09:31:36 +0800 |
|---|---|---|
| committer | Jia Liu <proljc@gmail.com> | 2013-08-21 09:31:42 +0800 |
| commit | 7717f248eebdcfe6de400404d0cf65dcb3633308 (patch) | |
| tree | 60e36a0433148bd8d37cceafb3d19e4690b66b5b /hw/openrisc | |
| parent | ed396e2b2d256c1628de7c11841b509455a76c03 (diff) | |
| download | qemu-7717f248eebdcfe6de400404d0cf65dcb3633308.tar.gz | |
hw/openrisc: Avoid undefined shift in openrisc_pic_cpu_handler()
In C99 signed shift (1 << 31) is undefined behavior, since the result
exceeds INT_MAX. Use 1U instead and move the shift after the check.
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Acked-by: Jia Liu <proljc@gmail.com>
Diffstat (limited to 'hw/openrisc')
| -rw-r--r-- | hw/openrisc/pic_cpu.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/hw/openrisc/pic_cpu.c b/hw/openrisc/pic_cpu.c index 3fcee02619..2af1d6013a 100644 --- a/hw/openrisc/pic_cpu.c +++ b/hw/openrisc/pic_cpu.c @@ -26,12 +26,14 @@ static void openrisc_pic_cpu_handler(void *opaque, int irq, int level) { OpenRISCCPU *cpu = (OpenRISCCPU *)opaque; CPUState *cs = CPU(cpu); - uint32_t irq_bit = 1 << irq; + uint32_t irq_bit; if (irq > 31 || irq < 0) { return; } + irq_bit = 1U << irq; + if (level) { cpu->env.picsr |= irq_bit; } else { |