diff options
| author | Andreas Färber <afaerber@suse.de> | 2013-07-11 17:13:43 +0200 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-07-29 20:44:47 +0200 |
| commit | f055e96bd4311d287c0e03faec02a1bdbc351925 (patch) | |
| tree | b2fd16ffacacbb26c7da89f171ffc027da4d8c39 /hw/pci-bridge/ioh3420.c | |
| parent | 45c0a675f9572f236b4be881576de9a626d2618f (diff) | |
| download | qemu-f055e96bd4311d287c0e03faec02a1bdbc351925.tar.gz | |
pci-bridge: Turn PCIBridge into abstract QOM type
Introduce TYPE_PCI_BRIDGE as base type and use PCI_BRIDGE() casts.
Reviewed-by: Don Koch <dkoch@verizon.com>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
[AF: Updated pbm-bridge parent to TYPE_PCI_BRIDGE]
Signed-off-by: Andreas Färber <afaerber@suse.de>
Diffstat (limited to 'hw/pci-bridge/ioh3420.c')
| -rw-r--r-- | hw/pci-bridge/ioh3420.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c index 47122c5276..815bed4d1f 100644 --- a/hw/pci-bridge/ioh3420.c +++ b/hw/pci-bridge/ioh3420.c @@ -92,7 +92,7 @@ static void ioh3420_reset(DeviceState *qdev) static int ioh3420_initfn(PCIDevice *d) { - PCIBridge* br = DO_UPCAST(PCIBridge, dev, d); + PCIBridge *br = PCI_BRIDGE(d); PCIEPort *p = DO_UPCAST(PCIEPort, br, br); PCIESlot *s = DO_UPCAST(PCIESlot, port, p); int rc; @@ -148,7 +148,7 @@ err_bridge: static void ioh3420_exitfn(PCIDevice *d) { - PCIBridge* br = DO_UPCAST(PCIBridge, dev, d); + PCIBridge *br = PCI_BRIDGE(d); PCIEPort *p = DO_UPCAST(PCIEPort, br, br); PCIESlot *s = DO_UPCAST(PCIESlot, port, p); @@ -171,9 +171,9 @@ PCIESlot *ioh3420_init(PCIBus *bus, int devfn, bool multifunction, if (!d) { return NULL; } - br = DO_UPCAST(PCIBridge, dev, d); + br = PCI_BRIDGE(d); - qdev = &br->dev.qdev; + qdev = DEVICE(d); pci_bridge_map_irq(br, bus_name, map_irq); qdev_prop_set_uint8(qdev, "port", port); qdev_prop_set_uint8(qdev, "chassis", chassis); @@ -190,8 +190,8 @@ static const VMStateDescription vmstate_ioh3420 = { .minimum_version_id_old = 1, .post_load = pcie_cap_slot_post_load, .fields = (VMStateField[]) { - VMSTATE_PCIE_DEVICE(port.br.dev, PCIESlot), - VMSTATE_STRUCT(port.br.dev.exp.aer_log, PCIESlot, 0, + VMSTATE_PCIE_DEVICE(port.br.parent_obj, PCIESlot), + VMSTATE_STRUCT(port.br.parent_obj.exp.aer_log, PCIESlot, 0, vmstate_pcie_aer_log, PCIEAERLog), VMSTATE_END_OF_LIST() } @@ -202,8 +202,8 @@ static Property ioh3420_properties[] = { DEFINE_PROP_UINT8("chassis", PCIESlot, chassis, 0), DEFINE_PROP_UINT16("slot", PCIESlot, slot, 0), DEFINE_PROP_UINT16("aer_log_max", PCIESlot, - port.br.dev.exp.aer_log.log_max, - PCIE_AER_LOG_MAX_DEFAULT), + port.br.parent_obj.exp.aer_log.log_max, + PCIE_AER_LOG_MAX_DEFAULT), DEFINE_PROP_END_OF_LIST(), }; @@ -229,7 +229,7 @@ static void ioh3420_class_init(ObjectClass *klass, void *data) static const TypeInfo ioh3420_info = { .name = "ioh3420", - .parent = TYPE_PCI_DEVICE, + .parent = TYPE_PCI_BRIDGE, .instance_size = sizeof(PCIESlot), .class_init = ioh3420_class_init, }; |