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| author | Stefan Weil <weil@mail.berlios.de> | 2011-04-28 17:20:35 +0200 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> | 2011-05-08 10:02:17 +0100 |
| commit | ff2712ba8938afe204dcbb0b50036b36fe057c42 (patch) | |
| tree | a92d58b6848cc19a92171ad152c7f9795fe42b4c /hw/pl031.c | |
| parent | 0cf818c476ae00e498091b1bdb72aac8faa003b0 (diff) | |
| download | qemu-ff2712ba8938afe204dcbb0b50036b36fe057c42.tar.gz | |
Fix typos in comments (interupt -> interrupt)
Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Diffstat (limited to 'hw/pl031.c')
| -rw-r--r-- | hw/pl031.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/pl031.c b/hw/pl031.c index 8c2f9d0bc7..017a313fda 100644 --- a/hw/pl031.c +++ b/hw/pl031.c @@ -161,7 +161,7 @@ static void pl031_write(void * opaque, target_phys_addr_t offset, pl031_update(s); break; case RTC_ICR: - /* The PL031 documentation (DDI0224B) states that the interupt is + /* The PL031 documentation (DDI0224B) states that the interrupt is cleared when bit 0 of the written value is set. However the arm926e documentation (DDI0287B) states that the interrupt is cleared when any value is written. */ |