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authorBlue Swirl <blauwirbel@gmail.com>2012-11-03 12:55:05 +0000
committerBlue Swirl <blauwirbel@gmail.com>2012-11-03 12:55:05 +0000
commitef84755ebb38b4f5629b24440bb00f1ef5287707 (patch)
treec2d74584b5f8c85c4c61ae650e628e08403b69ec /hw/ppc.c
parentb76f0d8c2e3eac94bc7fd90a510cb7426b2a2699 (diff)
parent0d3cf3b6ff469bba95ae235021a3be232af4068d (diff)
downloadqemu-ef84755ebb38b4f5629b24440bb00f1ef5287707.tar.gz
Merge branch 'trivial-patches' of git://github.com/stefanha/qemu
* 'trivial-patches' of git://github.com/stefanha/qemu: pc: Drop redundant test for ROM memory region exec: make some functions static target-ppc: make some functions static ppc: add missing static vnc: add missing static vl.c: add missing static target-sparc: make do_unaligned_access static m68k: Return semihosting errno values correctly cadence_uart: More debug information Conflicts: target-m68k/m68k-semi.c
Diffstat (limited to 'hw/ppc.c')
-rw-r--r--hw/ppc.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/hw/ppc.c b/hw/ppc.c
index fa7ae74f0d..11fd199eaa 100644
--- a/hw/ppc.c
+++ b/hw/ppc.c
@@ -736,7 +736,7 @@ static void cpu_ppc_hdecr_cb (void *opaque)
_cpu_ppc_store_hdecr(opaque, 0x00000000, 0xFFFFFFFF, 1);
}
-void cpu_ppc_store_purr (CPUPPCState *env, uint64_t value)
+static void cpu_ppc_store_purr(CPUPPCState *env, uint64_t value)
{
ppc_tb_t *tb_env = env->tb_env;
@@ -1167,23 +1167,23 @@ static inline void nvram_write (nvram_t *nvram, uint32_t addr, uint32_t val)
(*nvram->write_fn)(nvram->opaque, addr, val);
}
-void NVRAM_set_byte (nvram_t *nvram, uint32_t addr, uint8_t value)
+static void NVRAM_set_byte(nvram_t *nvram, uint32_t addr, uint8_t value)
{
nvram_write(nvram, addr, value);
}
-uint8_t NVRAM_get_byte (nvram_t *nvram, uint32_t addr)
+static uint8_t NVRAM_get_byte(nvram_t *nvram, uint32_t addr)
{
return nvram_read(nvram, addr);
}
-void NVRAM_set_word (nvram_t *nvram, uint32_t addr, uint16_t value)
+static void NVRAM_set_word(nvram_t *nvram, uint32_t addr, uint16_t value)
{
nvram_write(nvram, addr, value >> 8);
nvram_write(nvram, addr + 1, value & 0xFF);
}
-uint16_t NVRAM_get_word (nvram_t *nvram, uint32_t addr)
+static uint16_t NVRAM_get_word(nvram_t *nvram, uint32_t addr)
{
uint16_t tmp;
@@ -1193,7 +1193,7 @@ uint16_t NVRAM_get_word (nvram_t *nvram, uint32_t addr)
return tmp;
}
-void NVRAM_set_lword (nvram_t *nvram, uint32_t addr, uint32_t value)
+static void NVRAM_set_lword(nvram_t *nvram, uint32_t addr, uint32_t value)
{
nvram_write(nvram, addr, value >> 24);
nvram_write(nvram, addr + 1, (value >> 16) & 0xFF);
@@ -1213,8 +1213,8 @@ uint32_t NVRAM_get_lword (nvram_t *nvram, uint32_t addr)
return tmp;
}
-void NVRAM_set_string (nvram_t *nvram, uint32_t addr,
- const char *str, uint32_t max)
+static void NVRAM_set_string(nvram_t *nvram, uint32_t addr, const char *str,
+ uint32_t max)
{
int i;