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authorScott Wood <scottwood@freescale.com>2013-01-21 15:53:55 +0000
committerAlexander Graf <agraf@suse.de>2013-01-25 22:02:56 +0100
commitf5fba9d27f14603dc7f85779e7b7362fb1cfcbd8 (patch)
tree73e9334f6bc20c9d6ea9e40b783806157957b837 /hw/ppc/e500.h
parentbd25922e737a2c90668a7bdd1e1319413a7a51f3 (diff)
downloadqemu-f5fba9d27f14603dc7f85779e7b7362fb1cfcbd8.tar.gz
PPC: e500: Select MPIC v4.2 on ppce500 platform
The compatible string is changed to fsl,mpic on all e500 platforms, to advertise the existence of BRR1. This matches what the device tree will have on real hardware. With MPIC v4.2 max_cpu can be increased from 15 to 32. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Alexander Graf <agraf@suse.de>
Diffstat (limited to 'hw/ppc/e500.h')
-rw-r--r--hw/ppc/e500.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/ppc/e500.h b/hw/ppc/e500.h
index f5ff27385b..226c93d248 100644
--- a/hw/ppc/e500.h
+++ b/hw/ppc/e500.h
@@ -16,6 +16,8 @@ typedef struct PPCE500Params {
/* required -- must at least add toplevel board compatible */
void (*fixup_devtree)(struct PPCE500Params *params, void *fdt);
+
+ int mpic_version;
} PPCE500Params;
void ppce500_init(PPCE500Params *params);